Hello,
We are designing a single board computer using i.MXX8MM Soc.
In our case, we have 2 GB LPDDR4 which is the same as the EVK.
My Stack Up is
Top Layer Signal ( some of DDR data signals)
Mid Layer 1 GND
Mid Layer 2 SİGNAL ( Some of DDR data signals)
Mid Layer 3 POWER(DDR Main Power)
Mid layer 4 GND
Mid Layer 5 Signal(DDR Clock)
Mid layer 6 1.8V Power
Bottom Layer Signal
From the hardware design guide, what I understand mid layer 2 and mid-layer 5 should have a solid ground plane both above and below.
Q1: Must I provide a ground plane for both mid layer 3 and mid layer 6.
Q2: Is it enough to provide a ground plane just only one side rather than both sides.
Q3: Could you answer the second question for MIPI, USB, PCIe, SDIO, etc.
Q4 : Also , we want to use 4GB LPDDR4 that have same package with EVK LPDDR4(MT53D512M32D2DS-053 AUT: D) Do you suggest any of LPDDR4 (From the NXP community we found that MT53D1024M32D4DT-053 can be fit could you check it?)
Note : To be more clear I have attached a word file which shows the layer order and routing for LPDDR4 layout.)
