Dear NXP,
I doing channel mapping with BoardDataBusConfig section of MX8QM_B0_LPDDR4_RPA_1.6GHz_v17.xlsx after this configuration some of the value is not mapping properly.
PHY0
DATA 4 DDR_PHY_DX2DQMAP0_0 #N/A // DQ bit 0/1/2/3/4 remapping
DATA 4 DDR_PHY_DX2DQMAP1_0 #N/A // DQ bit 5/6/7 and DM remapping
DATA 4 DDR_PHY_DX3DQMAP0_0 #N/A // DQ bit 0/1/2/3/4 remapping
DATA 4 DDR_PHY_DX3DQMAP1_0 #N/A // DQ bit 5/6/7 and DM remapping
PHY1
DATA 4 DDR_PHY_DX2DQMAP0_1 #N/A // DQ bit 0/1/2/3/4 remapping
DATA 4 DDR_PHY_DX2DQMAP1_1 #N/A // DQ bit 5/6/7 and DM remapping
DATA 4 DDR_PHY_DX3DQMAP0_1 #N/A // DQ bit 0/1/2/3/4 remapping
DATA 4 DDR_PHY_DX3DQMAP1_1 #N/A // DQ bit 5/6/7 and DM remapping
Regards,
Vinothkumar Sekar
