Hello, do you want to debug the M4 with IAR ? I never tried to debug the A53 Cortex.
Here is the setup for IAR you can probably adapt it for Eclipse :
In addition, a jlink script has to be defined in the IAR project file <ProjectName>_Debug.jlink
[BREAKPOINTS]
ForceImpTypeAny = 0
ShowInfoWin = 1
EnableFlashBP = 2
BPDuringExecution = 0
[CFI]
CFISize = 0x00
CFIAddr = 0x00
[CPU]
MonModeVTableAddr = 0xFFFFFFFF
MonModeDebug = 0
MaxNumAPs = 0
LowPowerHandlingMode = 0
OverrideMemMap = 0
AllowSimulation = 1
ScriptFile="./m4Test_DebugScript.jlink"
[FLASH]
CacheExcludeSize = 0x00
CacheExcludeAddr = 0x00
MinNumBytesFlashDL = 0
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
EnableFlashDL = 2
Override = 1
Device="Cortex-M4"
[GENERAL]
WorkRAMSize = 0x00
WorkRAMAddr = 0x00
RAMUsageLimit = 0x00
[SWO]
SWOLogFile=""
[MEM]
RdOverrideOrMask = 0x00
RdOverrideAndMask = 0xFFFFFFFF
RdOverrideAddr = 0xFFFFFFFF
WrOverrideOrMask = 0x00
WrOverrideAndMask = 0xFFFFFFFF
WrOverrideAddr = 0xFFFFFFFF
Content of m4Test_DebugScript.jlink for imx8Mmini M4 (and I think content differs from the official script) :
/*********************************************************************
* (c) SEGGER Microcontroller GmbH & Co. KG *
* The Embedded Experts *
* www.segger.com *
**********************************************************************
-------------------------- END-OF-HEADER -----------------------------
*/
/*********************************************************************
*
* ResetTarget
*/
void ResetTarget(void) {
//
// This device requires a special reset as default reset does not work for this device.
// TBD
//
}
/*********************************************************************
*
* InitTarget
*/
void InitTarget(void) {
int v;
int Ctrl;
int CSGPR_ADDR;
int DP_REG_CTRL_STAT;
int DP_REG_SELECT;
int AHBAP_REG_CTRL;
int AHBAP_REG_ADDR;
int AHBAP_REG_DATA;
DP_REG_CTRL_STAT = 1;
DP_REG_SELECT = 2;
AHBAP_REG_CTRL = 0;
AHBAP_REG_ADDR = 1;
AHBAP_REG_DATA = 3;
Report("***************************************************");
Report("J-Link script: iMX8M Mini Cortex-M4 J-Link script");
Report("***************************************************");
JLINK_CORESIGHT_Configure("IRPre=0;DRPre=0;IRPost=0;DRPost=0;IRLenDevice=4");
CPU = CORTEX_M4; // Pre-select that we have a Cortex-M4 connected
JTAG_AllowTAPReset = 0; // J-Link is allowed to use a TAP reset for JTAG-chain auto-detection
//
// Power-up complete DAP
//
Ctrl = 0
| (1 << 30) // System power-up
| (1 << 28) // Debug popwer-up
| (1 << 5) // Clear STICKYERR
;
JLINK_CORESIGHT_WriteDP(DP_REG_CTRL_STAT, Ctrl);
//
// Select AHB-AP and configure it
//
JLINK_CORESIGHT_WriteDP(DP_REG_SELECT, (0 << 4) | (0 << 24));
Ctrl = 0
| (2 << 0) // AP-access size. Fixed to 2: 32-bit
| (1 << 4) // Auto increment TAR after read/write access. Increment is NOT performed on access to banked data registers 0-3.
| (1 << 31) // Enable software access to the Debug APB bus.
;
JLINK_CORESIGHT_WriteAP(AHBAP_REG_CTRL, Ctrl);
JLINK_CORESIGHT_WriteAP(AHBAP_REG_ADDR, 0x007E0000);
JLINK_CORESIGHT_WriteAP(AHBAP_REG_DATA, 0x20008000);
JLINK_CORESIGHT_WriteAP(AHBAP_REG_ADDR, 0x007E0004);
JLINK_CORESIGHT_WriteAP(AHBAP_REG_DATA, 0x1FFE0009);
JLINK_CORESIGHT_WriteAP(AHBAP_REG_ADDR, 0x007E0008);
JLINK_CORESIGHT_WriteAP(AHBAP_REG_DATA, 0xE7FEE7FE);
//
// Manually configure which APs are present on the CoreSight device
//
JTAG_SetDeviceId(0, 0x5BA00477); // 4-bits IRLen
CORESIGHT_AddAP(0, CORESIGHT_AHB_AP); // AXI-AP
CORESIGHT_AddAP(1, CORESIGHT_APB_AP); // APB-AP for CA53
CORESIGHT_AddAP(2, CORESIGHT_CUSTOM_AP);
CORESIGHT_AddAP(3, CORESIGHT_CUSTOM_AP);
CORESIGHT_AddAP(4, CORESIGHT_AHB_AP); // AHB-AP
CORESIGHT_IndexAHBAPToUse = 4;
}
/*********************************************************************
*
* SetupTarget
*/
void SetupTarget(void)
{
JLINK_MEM_WriteU32(0x3039000C, 0x000000A8);
JLINK_MEM_WriteU32(0x3039000C, 0x000000AA);
}
Then boot your board, and with u-boot start the M4 core with the command : bootaux 0x0
(Depending on were you want to load your firmware (0x0 is TCM, you have to adapt for DDR or OCRAM, and do the appropriate ICF memory zone arrangement and if DDR also reserved the area in Linux and make sure there is no peripheral conflicts with your dts)
After bootaux, you can load the firmware trough JTAG.
Hello,
thanks for the provided screenshots and JlinkScript. I got the Cortex-M4 of the I.MX 8M Mini running and I am able to debug it. But I was searching for debugging Cortex-A53 aswell.
I will post the settings for debugging the Cortex-M4 via Eclipse IDE for anyone stumbling over this topic:
P.S.: See attached files.
Thanks again!
