Issue with SPI Sensor Communication on iMX8QM

[rohitbhosale]

I hope this message finds you well. I am currently working on an iMX8QM platform and facing an issue with SPI sensor communication. I have successfully conducted an SPI loopback test, which worked flawlessly. However, when I connect any external sensor to the SPI bus, I do not receive any response from the sensor.

Here are some details of my setup:

Platform: iMX8QM
Test Conducted: SPI loopback test (successful)
Issue: No response from external sensor during SPI communication
I have checked the hardware connections, and everything seems to be in order. The SPI loopback test suggests that the SPI interface itself is functioning correctly. However, when I connect a sensor, the communication fails.

I would appreciate any insights or suggestions to troubleshoot and resolve this issue. Has anyone encountered a similar problem with SPI communication on the iMX8QM platform? Are there specific configurations or considerations that I might be overlooking?

Thank you in advance for your assistance.

[Zhiming_Liu]

1.Please share your spi dts node

2.Make sure you have loaded the sensor kernel driver.

3.Then check the kernel message.

[rohitbhosale]

It looks like you have a four-digit seven-segment display connected to a Max7219 IC through SPI and you're experiencing issues. The suggestions you received are valid steps to troubleshoot the problem. Here's a response you might use:

SThank you for your email. I appreciate your assistance in troubleshooting the connectivity issue with the four-digit seven-segment display connected to the Max7219 IC through SPI.

1.SPI DTS Node:
Here is the SPI DTS node we are currently using:

//imx8qm-apalis-v1.1.dtsi
/* Apalis SPI1 */
&lpspi0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpspi0>;
#address-cells = <1>;
#size-cells = <0>;
fsl,spi-num-chipselects = <2>;
cs-gpios = <&lsio_gpio3 5 GPIO_ACTIVE_LOW>, <&lsio_gpio5 26 GPIO_ACTIVE_LOW>;

spidev0: spi@0 {
compatible = "toradex,evalspi";
reg = <0>;
spi-max-frequency = <12000000>;
};

spidev2: spi@1 {
compatible = "toradex,evalspi";
reg = <1>;
spi-max-frequency = <12000000>;
};
};

/* Apalis SPI2 */
&lpspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpspi2>;
#address-cells = <1>;
#size-cells = <0>;
cs-gpios = <&lsio_gpio3 10 GPIO_ACTIVE_LOW>;

spidev1: spi@0 {
compatible = "toradex,evalspi";
reg = <0>;
spi-max-frequency = <4000000>;
};
};

//imx8-ss-dma.dtsi

lpspi0: spi@5a000000 {
compatible = "fsl,imx7ulp-spi";
reg = <0x5a000000 0x10000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
clocks = <&spi0_lpcg 0>,
<&spi0_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
power-domains = <&pd IMX_SC_R_SPI_0>;
dma-names = "tx","rx";
dmas = <&edma2 1 0 0>, <&edma2 0 0 1>;
status = "disabled";
};

lpspi2: spi@5a020000 {
compatible = "fsl,imx7ulp-spi";
reg = <0x5a020000 0x10000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
clocks = <&spi2_lpcg 0>,
<&spi2_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <60000000>;
power-domains = <&pd IMX_SC_R_SPI_2>;
dma-names = "tx","rx";
dmas = <&edma2 5 0 0>, <&edma2 4 0 1>;
status = "disabled";
};

lpspi3: spi@5a030000 {
compatible = "fsl,imx7ulp-spi";
reg = <0x5a030000 0x10000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
clocks = <&spi3_lpcg 0>,
<&spi3_lpcg 1>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_SPI_3 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <60000000>;
power-domains = <&pd IMX_SC_R_SPI_3>;
dma-names = "tx","rx";
dmas = <&edma2 7 0 0>, <&edma2 6 0 1>;
status = "disabled";
};

imx8qm-aplis-ixora-v1.1.dtsi

/* Apalis SPI1 */
&lpspi0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpspi0>;
#address-cells = <1>;
#size-cells = <0>;
fsl,spi-num-chipselects = <2>;
cs-gpios = <&lsio_gpio3 5 GPIO_ACTIVE_LOW>, <&lsio_gpio5 26 GPIO_ACTIVE_LOW>;

spidev0: spi@0 {
compatible = "toradex,evalspi";
reg = <0>;
spi-max-frequency = <12000000>;
};

spidev2: spi@1 {
compatible = "toradex,evalspi";
reg = <1>;
spi-max-frequency = <12000000>;
};
};

/* Apalis SPI2 */
&lpspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpspi2>;
#address-cells = <1>;
#size-cells = <0>;
cs-gpios = <&lsio_gpio3 10 GPIO_ACTIVE_LOW>;

spidev1: spi@0 {
compatible = "toradex,evalspi";
reg = <0>;
spi-max-frequency = <4000000>;
};
};

2. Sensor Kernel Driver
We have loaded the sensor kernel driver as part of our setup.

we have attached the DTS node configuration for SPI for your reference.

Regarding the Userspace code.
plz visit this link 

https://drive.google.com/drive/folders/167INqQY44oQ3vN3TN9Tc-fnV63oIlOcF?usp=sharing

Despite these steps, we are currently facing challenges in obtaining the expected output. We would appreciate any insights or further guidance you can provide.

Thank you for your time and assistance.

[Zhiming_Liu]

You may need add device node in spi node like this, this is an example from evk dts.

&lpspi2 {
	#address-cells = <1>;
	#size-cells = <0>;
	fsl,spi-num-chipselects = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpspi2 &pinctrl_lpspi2_cs>;
	cs-gpios = <&lsio_gpio3 10 GPIO_ACTIVE_LOW>;
	status = "okay";

	spidev0: spi@0 {
		reg = <0>;
		compatible = "rohm,dh2228fv";
		spi-max-frequency = <30000000>;
	};
};

Add spidev0 or spidev1 and add max7219 compatible name in drivers/spi/spidev.c

[rohitbhosale]

We don't have a kernel driver for the MAX7219 display, so we are communicating via user space. The code for communication is attached below, please check. https://drive.google.com/drive/folders/167INqQY44oQ3vN3TN9Tc-fnV63oIlOcF?usp=sharing

[rohitbhosale]

We wanted to inform you about the recent changes we made in the device tree for spi communication to MAX7219 display in IMX8QM-apalis-V1.1.dtsi file. 

we are utilizing a user space code for communication with the MAX7219 display. The relevant code is attached plz cheack link: https://drive.google.com/drive/folders/167INqQY44oQ3vN3TN9Tc-fnV63oIlOcF?usp=sharing

To compile the userspace code, we created an Android.mk file for the userspace code and utilized the mm utility within our source code. Subsequently, we pushed the resulting executable into the /system/bin directory of the device. However, upon running the executable, we encountered the following issues:

• The CS pin did not transition to a low state.
• Clock generation was not successful.

We further conducted tests by forcibly grounding the CS pin, but unfortunately, the clock generation issue persisted.

[Zhiming_Liu]

Hi @rohitbhosale 

Can you share all dtsi and dts you use? I thought this may relate to SCFW.

[rohitbhosale]

Our connection with the i.MX8QM and Matrix display is illustrated in the diagram below.

Our Modification :

We have done the below modification in the device tree  

First Configuration 

This configuration was already there in the default source code. But with this device tree modification, the spi is not working ( There is no signal movement on the CLK and CS line )

Second Configuration: 

We have taken the reference of this device tree configuration from the imx8qm-mek device tree . But with this device tree modification, the spi is not working ( There is no signal movement on the CLK and CS line )

Third Configuration :

We have taken the reference of this device tree configuration from the mx8qxp-lpddr4-val.dts . But with this device tree modification, the spi is not working ( There is no signal movement on the CLK and CS line )

[Zhiming_Liu]

Please check if there is othe node using SPI0 node, like on MEK , SAI is using SPI0 PAD.

	pinctrl_sai0: sai0grp {
		fsl,pins = <
			// IMX8QM_SPI0_CS1_AUD_SAI0_TXC              0x0600004c
			IMX8QM_SPI2_CS1_AUD_SAI0_TXFS             0x0600004c
			IMX8QM_SAI1_RXFS_AUD_SAI0_RXD             0x0600004c
			IMX8QM_SAI1_RXC_AUD_SAI0_TXD              0x0600006c
		>;
	};

 For device rate, you may need modify default device speed. 

These all depend on your board dtsi

[rohitbhosale]

Hello Zhiming_Liu,

With the below device tree configuration (Apalis SPI2 ) , The SPI clock and MOSI are working, please find the attched snap which shows the Clock and MOSI signals. but we are not getting any movement on the MISO lane.  

We have interfaced the BMP280 sensor on the SPI bus , We have tested this sensor on the RPI with same code and it is working fine ( We are able to read the Chip ID register ). Please find the attched source code for your refference. 

please let us know if we are missing something.

Please provide your email address so we can share the entire device tree files. 

[Zhiming_Liu]

If you are using SPI2, the userspace interface still be /dev/spidev0.0??

Can  you confirm this device node?

And please make sure that you can see the data you sent on data lane. 

[rohitbhosale]

Hello Zhiming_Liu,

 We are facing a critical issue with SPI communication on IMX8QM, and we are reaching out for urgent assistance. Given the crucial nature of our project and the limited time we have, we are seeking a quick response to help us overcome this challenge.

[rohitbhosale]

Any update 

[rohitbhosale]

Any Update 

[Zhiming_Liu]

Hi @rohitbhosale 

I will test same spi node in MEK, will reply you asap.

[rohitbhosale]

Any Update .....?