Issue with SPI Frequency Measurement on i.MX8MP based Custom Board

[Maulik_Manvar]

Hi NXP Community,

I’m currently working with an i.MX8MP processor on a custom-designed board and am encountering an issue with the SPI frequency. Specifically, I’ve configured the SPI bus with a spi-max-frequency of 25MHz, as specified by the datasheet for my MRAM device. MRAM is compatible with 0 to 40MHz frequency range. However, when I measure the actual SPI clock frequency using an oscilloscope, I observe a frequency of approximately 19.6MHz.

Here are the details of my setup:

Processor: i.MX8MP
SPI Clock Configuration: Set spi-max-frequency to 25MHz
Measured Frequency: 19.6MHz
Measurement Tool: Digital Storage Oscilloscope (DSO)
I have verified the following:

The MRAM datasheet confirms that it supports up to 40MHz.
The SPI configuration in the device tree seems correct. This is how I configured MRAM in my dts file.
mr25h40: mram@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mr25h40", "jedec,spi-nor";
reg = <0 0x00000000 0x00080000>;
spi-max-frequency = <30000000>;
status = "okay";
};
Could anyone provide insights into why there might be a discrepancy between the configured and measured SPI frequencies? Are there additional configuration parameters or settings I should check to ensure that the SPI clock is running at the desired frequency? Any advice or troubleshooting steps would be greatly appreciated.

Thank you in advance for your assistance!

Maulik

[Maulik_Manvar]

Please consider below typo in above provided dts configuration.
spi-max-frequency = <25000000>;

[Manuel_Salas]

Hello @Maulik_Manvar 

I hope you are doing well.

Could you please try following the example of the imx8mp-evk.dts?

Change the frequency to 25 MHz as you need, and test it with spidev to see if frequency is ok.

Best regards,

Salas.

[Manuel_Salas]

Also, it appears the mr25h40 is a non-JEDEC as you can see on the spi-nor core driver.

But first, please try with the above test.

Best regards,

Salas.

[Maulik_Manvar]

Hi @Manuel_Salas ,

Thank you for your input.

I have tried your suggestion. I removed my entries of MRAM and added default entry as below.

&ecspi2 {

#address-cells = <1>;

#size-cells = <0>;

fsl,spi-num-chipselects = <1>;

pinctrl-names = "default";

pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>;

cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;

status = "okay";

spidev1: spi@0 {

reg = <0>;

compatible = "rohm,dh2228fv";

spi-max-frequency = <500000>;

};

};

spidev test application log:

root@fusion:~/spidev-test# ./spidev -D /dev/spidev1.0 -s 30000000
spi mode: 0x0
bits per word: 8
max speed: 30000000 Hz (30000 KHz)
RX | FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF | ................................

I have enabled kernel logs for your reference.

Kernel Logs:

Jul 30 13:28:57 fusion kernel: [ 901.210267] spidev spi1.0: spi_imx_setup: mode 0, 8 bpw, 30000000 hz
Jul 30 13:28:57 fusion kernel: [ 901.210274] spidev spi1.0: setup mode 0, 8 bits/w, 30000000 Hz max --> 0
Jul 30 13:28:57 fusion kernel: [ 901.210486] spi_imx 30830000.spi: mx51_ecspi_clkdiv: fin: 80000000, fspi: 30000000, post: 0, pre: 2
Jul 30 13:28:57 fusion kernel: [ 901.210491] spi_imx 30830000.spi: mx51_ecspi_clkdiv: result frequency: 26666666 =>26.6MHz

Thanks,

Maulik

[Manuel_Salas]

Hello @Maulik_Manvar 

I test it by my side without any issue.

I used the device tree as same as you:

&ecspi2 {
	#address-cells = <1>;
	#size-cells = <0>;
	fsl,spi-num-chipselects = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>;
	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
	status = "okay";

	spidev1: spi@0 {
		reg = <0>;
		compatible = "rohm,dh2228fv";
		spi-max-frequency = <500000>;
	};
};

pinctrl_ecspi2: ecspi2grp {
		fsl,pins = <
			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK		0x82
			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI		0x82
			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO		0x82
		>;
	};

I used the command:

root@imx8mpevk:~# spidev_test -D /dev/spidev1.0 -s 80000000 -v

And my spi output:

Then:

root@imx8mpevk:~# spidev_test -D /dev/spidev1.0 -s 30000000 -v

SPI has the expected behavior.

Best regards,

Salas.

[Maulik_Manvar]

Hi @Manuel_Salas ,

Thank you so much for experiment the same.

So, Now I can see that, If you set 30MHz using  spidev_test -D /dev/spidev1.0 -s 30000000 -v
and You are getting 26.6MHz as an output frequency can see in DSO snap.

and

If you set 80MHz using  spidev_test -D /dev/spidev1.0 -s 80000000 -v
You are getting 80MHz full as an output frequency can see in DSO snap.

imx8mp default  base clock: ECSPI2 module uses a base clock frequency of 80 MHz, derived from the SYSTEM_PLL1_CLK (800 MHz).

If I set the frequencies to 1MHz, 2MHz, 4MHz, 5MHz, 10MHz, 16MHz, 20MHz, or 40MHz, I observe the full frequency on the DSO without any discrepancies. However, when setting the frequencies to 25 or 30MHz, I get 19.6 and 26.6MHz, respectively.

Could you please explain if there is any impact on the SPI device when the frequency is not exactly 30MHz? I would like to hear your thoughts on this.

Regards,
Maulik

[Manuel_Salas]

Hello @Maulik_Manvar 

It appears this is expected, because the SPI subsystem just can divide the clock in integers.

For example, in this case the clock used by SPI is 80MHz, so, dividing by:

80/1 = 80MHz

80/2 = 40MHz

80/3 = 26.66MHz

80/4 = 20MHz

The driver proximate the configured clock on the command with its divider.

There are not issue if the frequency is not exactly 30MHz because your device is UP to 40MHz.

Best regards,

Salas.