Issue about GPIO LVE Setting

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Issue about GPIO LVE Setting

588 次查看
tony_l_cai
Contributor III

Hi all,

     I have issues about GPIO Low Voltage Enable Field setting on i.mx6sl. First, in Iomux-v3.h of  kernel, I see the following define:

/*

* Use to set PAD control

*/

#define PAD_CTL_LVE_OFFSET (22)

#define PAD_CTL_LVE (1 << 18)

and I also see the i.mx6sl manual reference(p 1397) as the following picture "1.bmp". the LVE bit is 22 not 18. so is it wrong?

and whatever 18 or 22, I have tried it in kernel , it could not make the GPIO output the low voltage,and always 3.3v.  why?

So please give me some sample code about setting the LVE bit in kernel.

3Q!

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521 次查看
igorpadykov
NXP Employee
NXP Employee

Hi tony

Reference Manual gives correct description.

Linux sources have codes for different processors which may

have this bit in another position.

Best regards

igor

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