Hi Community!
I am curious about the description in the reference manual, so let me ask a question.
In "i.MX 8M Plus Applications Processor Reference Manual, Rev. 1," pp 5944, there is a description "SAI1 supports up to 8 I2S/TDM Tx lanes and 8 I2S/TDM Rx lanes at 768kHz/32-bit".
But The number of SAI1 channels is not mentioned.
Is it possible to transmit/receive 16 channels of 384KHz/32-bit (16*384K*4 = 25MB/sec) with 8 TDM Tx/Rx lane in SAI1 on IMX8MP?
Best Regards,
Takashi KASHIWAGI
已解决! 转到解答。
Hello!
For IMX8MP that is possible.
The SAI1 has 16 channels.
Your requirements can be handled for the IMX8MP or the IMX8MQ and you can see that in this post.
Best regards!
Hi Salas-san
Thank you dor reply.
> For IMX8MP that is possible.
> The SAI1 has 16 channels.
I understand. It looks like the design work will proceed as planned.
Best Regards,
KASHIWAGI Takashi
Hi @Alejandro_Salas san.
I'm sorry, but let me just check a few more points.
* IMX8MP supports up to 768KHz; can it also run 16ch * 768Khz/32bit (~50MB/s)?
* Is there a SAI that supports 32ch TDM?
Best Regards,
KASHIWAGI Takashi
Hello @Takashi_Kashiwagi , apologies for delay.
Yes, you can see in the page that you mentioned (5944 of the reference manual) that is possible.
About of SAI that supports 32 channels, that is not possible for the IMX8M family.
Best regards!
Hi @Alejandro_Salas -san
Thank you for reply!
> Yes, you can see in the page that you mentioned (5944 of the reference manual) that is possible.
> About of SAI that supports 32 channels, that is not possible for the IMX8M family.
I understand.
Best Regards,
KASHIWAGI Takashi