IMX8M Nano CSI-2 incompatibility

[hbeij]

Dear NXP,

After a lengthy investigation, I've reached the conclusion that the i.MX8M Nano processor does not support a MIPI CSI-2 sensor which has the CLK lane free running. Free-running CLK sensors work with the D-PHY on the i.MX8M Mini, i.MX6 series, i.MX7 series, but strangely, not on the i.MX8M Nano series.

Some sensors are running the CLK in gated mode (i.e. IMX219, from the Raspberry Pi V2.1 cam) or can be switched from default to gated CLK (i.e. OV5640). But my sensor, apparently, cannot (IMX290).

According to the datasheets, the D-PHY on Mini looks identical to the Nano, but in practice, its not. The Nano is advertised as a drop-in, pin-compatible replacement for the Mini, and regarding the CSI2, it is not.

I've prepared an investigative report as attachment, and I urgently request help for a work-around since we have a large business deal dependent on i.MX8Nano + IMX290 compatibility.

Best regards,

Hendrik

[hbeij]

Dear NXP, everyone,

Is there perhaps a undocumented register/switch I can use to flip the D-PHY to accept continuous CLK modes? As required by the MIPI CSI2 specification?

Thank you,

Hendrik

[hbeij · Accepted solution]

The issue has been solved.

There is no incompatibility.

The issue is caused by a "race condition" in the CSI2 driver. Unlike previous versions of the SOC CSI2 IP block, the one in iMX8MN needs to see the HS-transition on the CLK line at least once after it enables the transceiver. The way V4L2 is constructed, the sensor starts streaming before the CSI2 peripheral is enabled (hence missing the (single) transition in case of continuous clk mode)

[joanxie]

your questions has been escalated to the expert team, any update, I will let you know it

[hbeij]

Hello Joanxie,

Any update from NXP expert team yet?