IMX6ULL single eth0 doesn't work - linux-imx 5.10.9

[caiotoledo92]

We have a custom board based on MCIMX6ULL-EVK but has only a single ethernet phy (KSZ8081RNB).

Based on the linux-imx version 5.10.9 provided in meta-imx yocto layer we have patched the imx6ul-14x14-evk.dtsi file:

&fec1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet1>;
        phy-mode = "rmii";
        phy-handle = <&ethphy0>;
        /*phy-supply = <&reg_peri_3v3>;*/
        status = "okay";

        mdio {
                #address-cells = <1>;
                #size-cells = <0>;

                ethphy0: ethernet-phy@2 {
                        compatible = "ethernet-phy-id0022.1560", "ethernet-phy-ieee802.3-c22";
                        reg = <2>;
                        micrel,led-mode = <1>;
                        clocks = <&clks IMX6UL_CLK_ENET_REF>;
                        clock-names = "rmii-ref";
                };
        };
};

/*&fec2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet2>;
        phy-mode = "rmii";
        phy-handle = <&ethphy1>;
        phy-supply = <&reg_peri_3v3>;
        status = "okay";

        mdio {
                #address-cells = <1>;
                #size-cells = <0>;

                ethphy0: ethernet-phy@2 {
                        reg = <2>;
                        micrel,led-mode = <1>;
                        clocks = <&clks IMX6UL_CLK_ENET_REF>;
                        clock-names = "rmii-ref";
                };

                ethphy1: ethernet-phy@1 {
                        reg = <1>;
                        micrel,led-mode = <1>;
                        clocks = <&clks IMX6UL_CLK_ENET2_REF>;
                        clock-names = "rmii-ref";
                };
        };
};*/

With this change we get the message in dmesg identifying the phy:

Micrel KSZ8081 or KSZ8091 2188000.ethernet-1:02: attached PHY driver [Micrel KSZ8081 or KSZ8091] (mii_bus:phy_addr=2188000.ethernet-1:02, irq=POLL)

But the eth0 link doesn't get ready, check the full dmesg in dmesg-6.txt.

The defconfig used is the standard from linux-imx: imx_v7_defconfig.

Am I missing something in DTS configuration?

[igorpadykov]

Hi Caio

one can check if PHY address is correctly set with  PHYAD0-2 pins, also look at

IOMUXC_GPR_GPR1 ENET_CLK clock configuration in uboot function setup_fec()

https://source.codeaurora.org/external/imx/uboot-imx/tree/board/freescale/mx6ullevk/mx6ullevk.c?h=im...

dts:

https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi?h=...

Best regards
igor

[caiotoledo92 · Accepted solution]

Hello,

Thanks for the hint, but we found the solution.

Actually we have forgot to configure the pins ENET1_MDC and ENET1_MDIO:

         pinctrl_enet1: enet1grp {
                 fsl,pins = <
                         MX6UL_PAD_GPIO1_IO07__ENET1_MDC         0x1b0b0
                         MX6UL_PAD_GPIO1_IO06__ENET1_MDIO        0x1b0b0
                         MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN      0x1b0b0
                         MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER      0x1b0b0
                         MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
                         MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
                         MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN      0x1b0b0
                         MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
                         MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
                         MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1  0x4001b031
                 >;
         };

As soon we added these two lines:

MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0

The eth0 start to work.

Thanks for the attention.