IMX6ULL and ISL79988 Configuration for Quad View Camera Solution

[Wobaffet]

Hello,

We are evaluating a quad-camera design based on the i.MX6ULL and the Renesas ISL79988, and we would appreciate your guidance on a few points.

Our understanding is that the ISL79988 can combine 4 analog camera inputs into a single BT.656 output using line-interleaving, with channel ID information embedded in the stream. In this scenario, the i.MX6ULL would receive a single parallel BT.656 stream through its CSI interface.

We would like to ask:

1. Is the i.MX6ULL able to capture this type of line-interleaved BT.656 stream from the ISL79988 through its parallel CSI interface?
2. If yes, does the i.MX6ULL provide any hardware support to de-interleave or otherwise separate the incoming multi-channel stream based on the embedded channel ID information?
3. If hardware de-interleaving is not supported, have you seen this kind of use case implemented on i.MX6ULL with software demultiplexing after capture?
4. Since the ISL79988 output is interlaced BT.656, does the i.MX6ULL CSI have any hardware support for handling or deinterlacing interlaced input streams on the capture side? (There is information on the RM about deinterlacer just wanted to verify).
5. Have you had any experience, reference design, or known customer use case involving i.MX6ULL together with ISL79988 or a similar 4-channel analog video decoder for quad-camera viewing/capture?
6. Finally, since i.MX6ULL is a mature product, could you please share its current longevity / lifecycle status and whether there is any planned EOL notice at this stage?

Our target use case is not necessarily to expose 4 separate camera nodes initially; capturing all 4 camera channels reliably within a single stream would also be acceptable, as long as the data can later be interpreted and displayed correctly as quad view.

Thank you in advance for your support.

[JorgeCas]

Hello,

1. i.MX6ULL is able to capture BT.656 stream, you can use this post as reference but, we do not have an implementation example with i.MX6ULL and ISL79988 .

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/How-to-enable-i-MX6UL-CSI-port-support-B...

2. The de-interleave process should be implemented in SW.

3. You can use the post in answer 1 as reference.

4. No, there is no hardware support to handling/deinterlacing interlaced input BT.656 streams.

5. We do not have examples with these part numbers.

6. You can confirm your PN in the next link:

https://www.nxp.com/products/nxp-product-information/nxp-product-programs/product-longevity:PRDCT_LO...

Best regards.

[Wobaffet]

Thank you for the reply,

4. No, there is no hardware support to handling/deinterlacing interlaced input BT.656 streams.

Regarding deinterlacing, RM for the i.MX6ULL has this section attached. Doesn't this section describe what we need? 

Screenshot from 2026-03-24 15-18-43.png

2. The de-interleave process should be implemented in SW.

Regarding the de-interleave process, what is the feasibility on the MCIMX6Y2CVM05AB? Does this variant have sufficient processing power to handle such an operation? If so, could you please advise on the recommended methodology, particularly in terms of the data propagation path and which peripherals should be utilized?

Thanks!

[JorgeCas]

Hello, 

This deinterlacer only works for one camera.

Regarding the processing power, the total bandwidth of the BT.656 stream must remain within the capture capabilities of the CSI interface and the data should go from ISL79988 to CSI with all the lines combined and by software you need to isolate each camera data.

Best regards.

[Wobaffet]

Since the deinterlacer operates on a single camera stream, our understanding is that with ISL79988 4-channel interleaved output, software demultiplexing would have to be performed first. In that case, it seems we cannot rely on the i.MX6ULL hardware alone to support a real-time 2×2 quad-view pipeline, so i.MX6ULL + ISL79988 may not be a feasible solution for this use case. Could you please confirm whether this understanding is correct? Also, are there any alternative configurations using ISL79987/ISL79988 with another i.MX6 or i.MX8 device that would make this feasible? For example, with a MIPI CSI-2 interface using virtual channel support, we assume the system would still need per-channel deinterlacing capability after stream separation in order to support quad view correctly. Could you please verify this as well?