IMX6ULL ECSPI slave mode data transfer issue

[liqi_wu]

Current i use IXM6ULL SPI as slave mode. But I find the front of 8 bytes in SPI slave send is incorrect.

In this case, bps = 20M, BURST_LENGTH = 32, POL =0, PHA = 0, and SS_CTL[x] = 0. attach SPI configuration.

//issue description

1. I put below data to SPI TX FIFO:

00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F

2. but the front 8 bytes is incorrect.

sometimes as:

00 00 00 00 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F

sometimes as:

3C 3D 3E 3F 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F

[liqi_wu]

This issue is fixed. This question can close now.

The root cause is the SPI burst length are not equal with master and slave.

when I configurate the master SPI and slave SPI burst length is 32bit or 128bit, this issue is disappeared. 

[igorpadykov]

Hi liqi

one can recheck if correct escpi initialization performed in the case,

described in sect.20.5 Initialization i.MX 6ULL Applications Processor Reference Manual

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[liqi_wu]

Hi igor,

Sorry for reply so late.

I use function(ECSPI_SlaveInit) which in SDK_2.2_MCIM6ULL to initiate the ECSPI.

The interesting thing is: why the front of four bytes data in SPI slave send is the end four bytes which the data in SPI slave last send?

//issue description

1. I put below data to SPI TX FIFO:

00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F

2. but the front 4 bytes is incorrect.

First sometimes as:

00 00 00 00 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F

After that sometimes as:

3C 3D 3E 3F 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F

sometimes as:

3C 3D 3E 3F 00 00 00 00 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F

I wonder if it is caused by incorrect configuration or if it is the issue of IMX6ULL?

Thanks!

wuliqi