Hello All,
We have a custom board based on iMX6 quad core processor. It is designed to boot from eMMC.
Processor: IMX6 Quad， MCIMX6Q6AVT10AD
eMMC ： IS21ES08G-JCLI
PMIC：MMPF0100F0AEP（Unconnected button battery）
Problem :
We see majority of boards boots as designed. But there are random failures on one or two boards per hundred( 1 to 2% only).When the startup fails, both SD3_CMD and SD3_CK remain high without any communication waveform.
Power supply design reference SCH-27516, VDDHIGH_IN is provided through PMIC GEN5, and VDD_SNVS_IN is provided through PMIC VSNVS.
The following figure shows the power on timing sequence of the power supply
When we modified the design and changed VDDHIGH_IN from PMIC GEN5 to PMIC SW2, the issue of startup failure was resolved.
The following figure shows the modified power on sequence of the power supply
It can be observed that the time difference between VDDHIGH_IN and POR_B has increased from 2.8ms to 16ms.
Our question is:
1. Does VDDHIGH_IN have to be connected to VDD_SNVSIN without using button batteries
2. Does VDHIGH_IN have any power on sequence requirements relative to other power rails such as VDDARM_IN and VDDSOC_IN
3.Is there a time requirement for POR_B signal relative to VDDHIGH_IN, such as setting POR_B high after VDDHIGH_IN is ready for more than 5ms.
Looking forward to receiving a response to our questions, thank you!
