I2S Audio Noise problem with iMX6

[murakami]

Hi, all.

I developed iMX6Solo board with Wolfson WM8983 audio codec.(connected to SSI I/F).

On a few of the boards, the noise is on the audio output.

I checked it and found the following:

- Sometimes, The TXD data from iMX are not correct.

  For example, even if I play stereo audio that have only Left channel data,

  the data is on Right timing (TXFS=High). Or the Left data isn't correct.

- I can resolve the noise, if I change the TXC clock from the codec.

    TXC frequency = TXFS * 2 * 128 ...  noise

    TXC frequency = TXFS * 2 * 16 ... no noise

- If I change the TXC/TXFS pin's hysteresis or Pull-up/down setting,

  the noise is changed or disappeared.

I think the problem is something to do with the sync of TCX/TXFS and TXD(transmit controller of iMX).

If I use the audio data with WL=16bit / 2ch, I must set TXC frequency to TXFS*2*16?

I've thought it's OK to set it over TXFS*2*16 for the oversampling.

Would you give me some advice for me about this problem?

[My Environment Detail]

iMX6 Solo : I2S Slave Mode

Wolfson WM8983 : I2S Master Mode (connected to SSI I/F)

OS = Windows Embedded Compact7

TXFS Clock = 44.1KHz

TXC Clock = 11.29MHz

Word Length = 16bit / 2ch

The SSI's registers were set according to RM "61.8.1.4 I2S Mode"

SSI Register Values (only related to transfer)

  SSI2_SCR =   0x00000153

  SSI2_STCR =  0x0000038D

  SSI2_STCCR = 0x0000E100

I'm sorry I'm not good at English.

Thanks,

[igorpadykov]

Hi Satoshi

TXC freq =  TXFS * (channels) * (word length) settings

should not depend on signal direction.

In this particular case it may influence on overall system noise, thus

creating additional audio noise.

Best regards

igor

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[murakami]

Hi igor

Thank you for your replay.

Let me confirm.

You mean I must set "TXC freq = TXFS * (channels) * (word length)"?

For exapmle, if I want to use audio 44.1Hz/16bit/2ch, I should set the following?

  TXFS freq = 44.1KHz

  TXC freq =   44.1KHz * 2 * 16 = 1.41MHz

Best regards

Murakami

[igorpadykov]

Hi Murakami

for calculation ssi clocks please refer to

sect.61.8.4.2 DIV2, PSR and PM Bit Description

i.MX6DQ Reference Manual

http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf

Best regards

igor

[murakami]

Hi igor.

According to "Figure 61-22" and "Figure 61-23" of RM,

DIV2,PSR and PM is valid output only when TXDIR is 1.

This means the SSI is used as I2S slave (TXDIR=0), these setting have  no effect. I think.

So I didn't set these setting.

Both TXC(=STCK) and TXFS(= STFS) are external clock, and Tx controller work with them.

So I suppose that there are any restricts among exteral input TXC,TXFS and Tx controller (and ssi_clk).

For example, we should "TXC freq = TXFS * (channels) * (word length)".

Best regards

igor

[igorpadykov]

formula given in that section is valid for both external and

internal clocks.

~igor

[murakami]

Hi igor.

Do you mean that "DIV2,PSR and PM setting is valid for external clock(1)"?

or "Table 61-7" is valid for extenal clock(2)"?

If you mean (1),

The externl clock is created by audio codec and input to SSI, so DIV2,PSR and PM setting's

formula is meaningless for external clock, I think.

If you mean (2),

according  Table 61-7, you say that we have to set 1411.2kHz for STCK for the following

condition, right?

  Bits/Word = 16

  Words/Frame = 2

  Ideal Frame Rate = 44.1kHz

Best regards

Murakami

[igorpadykov · Accepted solution]

Hi Murakami

formulas and data in "Table 61-7" are valid for

any generated clock external or internal.

Best regards

igor

[satoshishimoda]

Hi Igor,

Murakami-san seems to be confused by the formulas and Table 61-7 since these indicate the information how to create bit clock and frame sync clock in i.MX6 with the dividers (DIV2, PSR, PM, WL, and DC) originally.

So please reply with simple answer "yes" or "no" to his simple question, "should we set TXC freq to 'TXFS * (channels) * (word length)'? ".

Best Regards,

Satoshi Shimoda

[igorpadykov]

Hi Satoshi

yes

Best regards

igor

[murakami]

Hi Igor,　and Shimoda-san

Thank you for your reply.

I use "TXFS * (channels) * (word length) settings" for resolution of noise problem.

Best regards

Murakami

[igorpadykov]

Hi Hideyuki

if issue appears only on few boards and with changing hysteresis/ pull-up/down

settings the noise is changing/disappear, then issue may be caused by signal

integrity and it makes sense to observe it with oscilloscope and tweak drive

strength settings using register IOMUXC_SW_PAD_CTL_PAD_x_y.

Note, bad soldering also may cause noise.

Best regards

igor

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[satoshishimoda]

Dear Igor,

> If I use the audio data with WL=16bit / 2ch, I must set TXC frequency to TXFS*2*16?

I have a same question about TXC frequency setting as the above one.

Is it no problem if I set TXC freq > TXFS * (channels) * (word length)  when both signals are input?

Or should I set TXC freq =  TXFS * (channels) * (word length) ?

Best Regards,

Satoshi Shimoda

[murakami]

Hi, igorpadykov

Thank you for your reply.

I checked TXC, TXFS, TXD with oscilloscope.But I can't find the problem of signal, and

thier timing  meet the spec of DOC#IMX6SDCLEC "4.11.19.3 SSI Transmitter Timing with External Clock".

About tweaking signals, the TXC and TXFS are both input pin, so

I think only HYS and PUS of IOMUX_SW_PAD_CTL_PAD_x_y affect to the signal.

The resutl of the change them is the following:

  Changing PUS ... the noise is changed, but is appeared.

  Disable HYS of TXC only ... the noise is disappeared.

  Disable HYS of TXFS only ... the noise is disappeared.

  Disable HYS of both TXC and TXFS ... the noise is changed, but is appeared.

I don't think that these signals are so sensitive that the hysteresis cause or don't cause the problem.

If so senstive, I should tweak pin setting for each board..

Thanks,

H.Murakami