I want to confirm about i.MX6 LVDS spec.

[satoshishimoda]

Hi community,

I want to confirm some additional spec and meaning of i.MX6 LVDS interface.

Please see my questions below.

1) Please see chapter 4.7.3 in IMX6DQCEC (Rev.2.3). I didn't find "jitter" and "duty" data of LVDS clock output. Do you have them?

2) Please see chapter 4.8.3 in IMX6CQCEC. I want to confirm the meaning of "The LVDS interface complies with TIA/EIA 644-A standard.". Which meaning is correct?

  A) i.MX6 LVDS interface complies with transmitter spec of TIA/EIA 644-A standard.

  B) i.MX6 can output a LVDS signal that is able to received by TIA/EIA 644-A standard compliant receiver.

Best Regards,

Satoshi Shimoda

[LinWang · Accepted solution]

Hi Satoshi Shimoda,

Sorry, FSL don't provide "jitter" related info in DS.

"jitter" performance is related PLL performance and board design, so i suggest consider real test result on your actual design.

I believe A option is the answer.

Thanks!

[satoshishimoda]

Hi LinWang,

Thank you for your reply.

OK, I understand about jitter and question no.2.

Then, how about "duty" in question no.1?

I guess typical duty = 50%, but I want to know min/max duty, too.

Best Regards,

Satoshi Shimoda

[LinWang]

Hi Satoshi Shimoda,

Please find related info in TIA-EIA-644-A-2001 if there is no in latest i.Mx DS.

i.Mx follow this standard.

Thanks!