Dear
Could you confirm if there is any restriction for bit-swapping on LPDD4?
From the Hardware Developer's guide, Regarding LPDDR4 routing, I found " Bit swapping within each slice/byte lane is Ok".
What I undersande it is that DRAM_DQ of I.MX8 can be routed to any data pin of LPDDR4 within a Byte lane. Let me make example like DRAM_DQ01 rounted to DQ7(LPDDR4).
Aa far as I remember, a Certain NXP processor limited bit swapping within a nibble ( 4-bit lane).
I just make sure of what I understand.
I appreciate your help in advance.
thank you
Best Regards
Mark Kim
