Hello,
Does e9165(eCSPI: TXFIFO empty flag glitch can cause the current FIFO transfer to be sent) also affect UART if I set ECSPI2 as UART4?
We connect UART4 to a RS485/RS422/RS232 Multiprotocol transceiver(F81439AN) and got an issue with TXFIFO works abnormal.
IOMUXC_SW_MUX_CTL_PAD_ECSPI2_SS0 --> ALT1_UART4_RTS_B
IOMUXC_SW_MUX_CTL_PAD_ECSPI2_MISO --> ALT1_UART4_CTS_B
IOMUXC_SW_MUX_CTL_PAD_ECSPI2_MOSI --> ALT1_UART4_TX
IOMUXC_SW_MUX_CTL_PAD_ECSPI2_SCLK --> ALT1_UART4_RX
