Thanks Igor for your reply.
I already use this code as an example for my project. There must be some very small difference, but I can't see it.
This is what I do:
1. allocate some data: char some_data[512] = "..." stored at address '0xc7800a84'
2. make sure the length (in bytes) is a multiple of 512 (block aligned)
3. send command-16 (SET_BLOCKLEN)
4. set the BLK_ATT register to '0x10200' - 1 block of 512 bytes to be sent
5. set the WTMK_LVL register, field WR_WML, to 0x80
6. create my adma2 descriptor:
> address = 0xc7800a84
> length = 512
> attributes = 0x23 (TRAN + VALID + END)
> result = 0xc7800a8402000023 stored at address '0xc78009b4'
7. set the ADMA_SYS_ADDR to '0xc78009b4'
8. send command-25 (WRITE_MULTIPLE_BLOCK)
register MIX_CTRL = 0x27
register PROT_CTRL = 0x800220 (DMASEL = '10' (adma2) and endian-mode is '10' (little endian) )
Then, immediately after register CMD_XFR_TYPE is set, I get a DMA error interrupt and the error is 0x7. The contents of the ADMA_SYS_ADDR is 0xc. I'm wondering if it is a coincidence that the address of my descriptor table also starts with '0xc...' (0xc78009b4)
Command-25 is executed completely without errors.
The only thing I don't do is flushing the d-cache because, in my environment (DDC-I Deos operating system), I don't know how to do this yet....
