I.MX6 ULL NVCC_SD1 Power domain

[massimo2]

Hello

I can't find if NVCC_SD1 ball is linked only to uSDHC1 power domain or both uSDHC1 and uSDHC2.

i read
"All ports can work with 1.8 V and 3.3 V cards. There
are two completely independent I/O power domains
for Ports #1 and #2 in four bit configuration"

But i can't find where are those config bits and how to set them in the manual.

I would like to set 1.8V for SD1 and 3.3V for SD2

Thank you

[art]

The NVCC_SD1 power rail is only applied to uSDHC1 I/O power domain. The I/O
signals of uSDHC2 are multiplexed with NAND Flash interface signals in the
NVCC_NAND power domain.

There are no any I/O voltage selection bits within the processor. The required
I/O voltage should be applied externally to the corresponding power domain.

Best Regards,
Artur