Hi,
When we performed the operations in the attached document on the M4 processor of the IMX8MQ, we were unable to use the BT_UART4 pins (J2.20, 22, 24, 26) as ECSPI2. However, we were able to use and control the pins (J2.20, 22, 24, 26) as GPIO. Can you help us to enable ECSPI2 on the M4 processor? (Note: I using evk DART-MX8M.)
Below I share the sample code written in ecspi2. When used below code, ecspi2 could'nt work but the same pins I could use it as an GPIO pin. Do I need to changed dts files for using to ecspi2/ecspi3.
#define ECSPI_TRANSFER_SIZE 64
#define ECSPI_TRANSFER_BAUDRATE 500000U
#define ECSPI_MASTER_BASEADDR ECSPI2
#define ECSPI_MASTER_CLK_FREQ \
CLOCK_GetPllFreq(kCLOCK_SystemPll1Ctrl) / (CLOCK_GetRootPreDivider(kCLOCK_RootEcspi2)) / \
(CLOCK_GetRootPostDivider(kCLOCK_RootEcspi2))
#define ECSPI_MASTER_TRANSFER_CHANNEL kECSPI_Channel0
ecspi_transfer_t masterXfer;
ecspi_master_config_t masterConfig;
uint32_t masterRxData[ECSPI_TRANSFER_SIZE] = {0};
uint32_t masterTxData[ECSPI_TRANSFER_SIZE] = {0};
CLOCK_SetRootMux(kCLOCK_RootEcspi2, kCLOCK_EcspiRootmuxSysPll1); /* Set ECSPI1 source to SYSTEM PLL1 800MHZ */
CLOCK_SetRootDivider(kCLOCK_RootEcspi2, 2U, 5U); /* Set root clock to 800MHZ / 10 = 80MHZ */
ECSPI_MasterGetDefaultConfig(&masterConfig);
masterConfig.baudRate_Bps = ECSPI_TRANSFER_BAUDRATE;
masterConfig.enableLoopback = true;
ECSPI_MasterInit(ECSPI_MASTER_BASEADDR, &masterConfig, ECSPI_MASTER_CLK_FREQ);
masterXfer.txData = masterTxData;
masterXfer.rxData = masterRxData;
masterXfer.dataSize = ECSPI_TRANSFER_SIZE;
masterXfer.channel = ECSPI_MASTER_TRANSFER_CHANNEL;
GPIO_PinWrite(BT_GPIO, BT_GPIO_PIN, 1U);
ECSPI_MasterTransferBlocking(ECSPI_MASTER_BASEADDR, &masterXfer);
GPIO_PinWrite(BT_GPIO, BT_GPIO_PIN, 0U);
