How to take A7 core to Deep Sleep Mode while keeping M4 core and some peripherals alive ?

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How to take A7 core to Deep Sleep Mode while keeping M4 core and some peripherals alive ?

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harish_g
Contributor III

In our application , it is necessary to keep the M4 alive in certain situations , while shutting down the A7 core inorder to save power . Going by the details present in the Technical Reference Manual , we can configure the SoC to shutdown specific domains in the SoC .

But when we tried to configure such details through memtool , the memory remained unresponsive to all the writes that were performed on the General Power Controller .

When trying to take the i.MX7 to suspend by writing mem to /sys/power/state , The entire system was put into sleep mode including the M4 core . Is there a way in the linux user space , where we can configure the domains which need to be turned off during deep sleep mode ? Or is there any way at all , by modifying things in kernel space to acheive the selective suspend that we are desiring ? 

Thank You 

G.Harish

imx7d‌ i.mx7d sabre‌ suspend‌ deep sleep‌ gpc‌ power managment‌ cortex - m4‌ cortex-a7‌

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6 Replies

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will_castelnau
Contributor I

Hi folks,

Apologies for reviving an old thread, fast forwarding two years things might have changed...

1) Can NXP confirm if it is still "impossible" to keep the Cortex-M4 running when the Cortex-A7 is in deep sleep please?

2) As per bob.jones@fasetto.com‌' last reply, can power domains help?

3) Are there any other NXP heterogeneous platforms that can support this mode please?

Regards,

Will.

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diegoadrian
NXP Employee
NXP Employee

Hello,

The only heterogenous product that we currently have at the moment that could support this feature is the i.MX7ULP. 

This processor can run both cores simultaneously and both cores are independent of each other. 

For more information, please see the below web page:

i.MX 7ULP Applications Processor | Arm Cortex-A7 + M4 with ultra-low power | NXP 

Hope this information could help you.

Best regards,

Diego.

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Rgulde
Contributor II

What makes the i.MX7 ULP different? Is it just that the kernel only supported the i.MX7 ULP at that time and no one has ported the sleep/power down to other SoCs?

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bob_jones
Contributor I

Can you move the M4 core from domain 0 (which is where A7 Core is) to domain 1 and other required peripherals to domain 1 as well?  then put the A7 cores to sleep.

Regards,

Bob

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diegoadrian
NXP Employee
NXP Employee

Hello Erik,

Unfortunately, is impossible for the i.MX7 keep the M4 core wake while the A7 core is in sleep mode.

This is because the M4 core is like a peripheral for the A7 core. The A7 core can only control the M4 core not.

I apologize for this inconvenient.

Best Regards,

Diego.

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erikcokeley
Contributor II

I've been reading the Reference Manual but can't understand how to turn off certain things in Sleep. I too want to leave the M4 running in sleep mode but I do not require doing it from userspace.

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