How to support 8bit serial RGB LCD with 6ULL

[stoneliu]

Hi Team,

Please give some comments how to support 8bit serial RGB LCD, attached file is the LCD spec.

Before this LCD worked well for i.MX257, now we are porting this to 6ULL. We tried in DOTCLK interface 3 weeks, but still can't resolve. 

Configed as below, but can't work. Please help, this is very urgent for us.

LCD_DATABUS_WIDTH  8bits

WORD_LENGTH   24 bits

Thanks,

Stone

[Jeffye]

elcdif does not support serial 8 bit initial timing setting
You need to modify the elcdif register by yourself, the example is as follows

base->VDCTRL2 =
((uint32_t)config->hsw << LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_SHIFT) |
(((uint32_t)config->hfp + (uint32_t)config->hbp + (uint32_t)config->panelWidth * 3 + (uint32_t)config->hsw))
<< LCDIF_VDCTRL2_HSYNC_PERIOD_SHIFT;

base->VDCTRL4 = LCDIF_VDCTRL4_SYNC_SIGNALS_ON_MASK |
(((uint32_t)config->panelWidth * 3) << LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT_SHIFT);

[zhenhua_lin]

Hi, 

I check the uboot source code on version uboot-imx_v2018.03.

The mxsfb.c init lcd function mxs_lcd_init write as bellow:

{{{

static void mxs_lcd_init(GraphicDevice *panel,
struct ctfb_res_modes *mode, int bpp)
{
struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)(ulong)(panel->isaBase);
uint32_t word_len = 0, bus_width = 0;
uint8_t valid_data = 0;

/* Kick in the LCDIF clock */
mxs_set_lcdclk(panel->isaBase, PS2KHZ(mode->pixclock));

/* Restart the LCDIF block */
mxs_reset_block(&regs->hw_lcdif_ctrl_reg);

switch (bpp) {
case 24:
word_len = LCDIF_CTRL_WORD_LENGTH_24BIT;
bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_24BIT;
valid_data = 0x7;
break;
case 18:
word_len = LCDIF_CTRL_WORD_LENGTH_24BIT;
bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_18BIT;
valid_data = 0x7;
break;
case 16:
word_len = LCDIF_CTRL_WORD_LENGTH_16BIT;
bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_16BIT;
valid_data = 0xf;
break;
case 8:
word_len = LCDIF_CTRL_WORD_LENGTH_8BIT;
bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_8BIT;
valid_data = 0xf;
break;
}

writel(bus_width | word_len | LCDIF_CTRL_DOTCLK_MODE |
LCDIF_CTRL_BYPASS_COUNT | LCDIF_CTRL_LCDIF_MASTER,
&regs->hw_lcdif_ctrl);

writel(valid_data << LCDIF_CTRL1_BYTE_PACKING_FORMAT_OFFSET,
&regs->hw_lcdif_ctrl1);

#ifdef CONFIG_IMX_MIPI_DSI_BRIDGE
writel(LCDIF_CTRL2_OUTSTANDING_REQS_REQ_16, &regs->hw_lcdif_ctrl2);
#endif

writel((mode->yres << LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET) | mode->xres,
&regs->hw_lcdif_transfer_count);

#ifdef CONFIG_IMX_SEC_MIPI_DSI
writel(LCDIF_VDCTRL0_ENABLE_PRESENT |
LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT |
LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT |
mode->vsync_len, &regs->hw_lcdif_vdctrl0);
#else
writel(LCDIF_VDCTRL0_ENABLE_PRESENT | LCDIF_VDCTRL0_ENABLE_POL |
LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT |
LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT |
mode->vsync_len, &regs->hw_lcdif_vdctrl0);
#endif
writel(mode->upper_margin + mode->lower_margin +
mode->vsync_len + mode->yres,
&regs->hw_lcdif_vdctrl1);
writel((mode->hsync_len << LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_OFFSET) |
(mode->left_margin + mode->right_margin +
mode->hsync_len + mode->xres),
&regs->hw_lcdif_vdctrl2);
writel(((mode->left_margin + mode->hsync_len) <<
LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT_OFFSET) |
(mode->upper_margin + mode->vsync_len),
&regs->hw_lcdif_vdctrl3);
writel((0 << LCDIF_VDCTRL4_DOTCLK_DLY_SEL_OFFSET) | mode->xres,
&regs->hw_lcdif_vdctrl4);

writel(panel->frameAdrs, &regs->hw_lcdif_cur_buf);
writel(panel->frameAdrs, &regs->hw_lcdif_next_buf);

/* Flush FIFO first */
writel(LCDIF_CTRL1_FIFO_CLEAR, &regs->hw_lcdif_ctrl1_set);

#ifndef CONFIG_VIDEO_MXS_MODE_SYSTEM
/* Sync signals ON */
setbits_le32(&regs->hw_lcdif_vdctrl4, LCDIF_VDCTRL4_SYNC_SIGNALS_ON);
#endif

/* FIFO cleared */
writel(LCDIF_CTRL1_FIFO_CLEAR, &regs->hw_lcdif_ctrl1_clr);

/* RUN! */
writel(LCDIF_CTRL_RUN, &regs->hw_lcdif_ctrl_set);
}

}}}

That can not use 8bits bus-width interface to 24 bits LCD. Please ref the case session.

Thanks.

Zhenhua

[igorpadykov]

Hi Stone

one can look at below link with similar issue:

https://community.nxp.com/t5/i-MX-Processors/LCDIF-8bits-bus-width-interface-to-24-bits-LCD-display-...

Best regards
igor