Dear Mr Yuri
Thanks for your message!
Please find attached a schematics , simplified to show the concept.
Our goal is to use the iMX7 EIM module to directly interface to our legacy peripheral boards , all drive using old INTEL 8051 or 8096 controllers bus signals and timing.
We designed to use the IMX7 ALT4 configuration, where the EIM pins and register are in multiplexed mode.
In that way we need to emulate AD0-AD15 multiplexed address and data lines, as well RD# WR# ALE and CSx.
Note that we use the EIM-LBA_B signal as the ALE latch enable, and the EIM_OE as the RD# signal.
In the bus all A0-A15 was latched, and D0-D15 is the original AD0-AD15 multiplexed. Note the use of an external 74373 to latch address using LBA_B signal as ALE , going to external bus.
We need to generate the correct sequence and timing ALE CS WR/RD .
The attached schematics did not show the levels shifters, in sake of simplicity, but is necessary as the iMX7 is a 3.3V and the 8051 legacy bus 5V.
Please , inform if there is a application note or a more detailed guidelines on how to setup all EIM registers, and how to generate the correct timing on controls signals.
Thanks!
Mario Stefani
De: Yuri <admin@community.nxp.com>
Enviada em: quinta-feira, 16 de abril de 2020 23:55
Para: Mario A. Stefani <mario.stefani@opto.com.br>
Assunto: Re: - Re: How to setup EIM on iMX7 to emulate legacy INTEL bus
<https://community.freescale.com/resources/statics/1000/35400-NXP-Community-Email-banner-600x75.jpg> NXP Community
Re: How to setup EIM on iMX7 to emulate legacy INTEL bus
reply from Yuri Muhin <https://community.nxp.com/people/Yuri?et=watches.email.thread> in i.MX Processors - View the full discussion <https://community.nxp.com/message/1299603?commentID=1299603&et=watches.email.thread#comment-1299603>