How to set certain GPIO as input touch interrupt on QNX 7.1 for i.MX 8QuadMax (iMX8QM)?

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How to set certain GPIO as input touch interrupt on QNX 7.1 for i.MX 8QuadMax (iMX8QM)?

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wslin123
Contributor I

Hello there,

As titled, I want to find a GPIO pin to set as input touch interrupt on QNX 7.1 for i.MX 8QM board.

I have two problems:

  1. I'm not sure what the IRQ vector is for the specific GPIO pin. I picked LVDS0_TS_INT pin (as highlighted pin in the below figure) as input touch interrupt but I couldn't find what the interrupt vector is.
    IMG_9456.jpeg
    I have found that the interrupt vectors for LVDS0 are in the range 800~831. However, I didn't know what exact the interrupt vector for LVDS0_TS_INT pin is.
    From imx8qm-cpu-mek-graphics.build:
    IMG_9458.jpeg
    From imx_init_intrinfo.c:
    IMG_9459.jpeg
    Or is there any pin appropriate to be used as input touch interrupt? For example, H3 and J19 pin headers on base board. I mention these two pin headers only because they're connectable by "Dupont Line" but I'm not sure about if they're suitable for my case.
    IMG_9460.jpeg
    IMG_9461.jpeg
    IMG_9463.jpeg
  2. I also couldn't find how to configure registers to set trigger type (such as rising/falling/low-level/high-level trigger) of the specific GPIO pin. Does anyone know where I can find IRQ routing registers? They're not in the official reference manual document.

    The configuration may be like below code snippets: 

    //Make the pin input
    out32((dp->gpio1_regbase + GPIO_OE), in32(dp->gpio1_regbase + GPIO_OE) | pin);
    //low level irq detect
    out32(dp->gpio1_regbase + GPIO_LEVELDETECT0, in32(dp->gpio1_regbase + GPIO_LEVELDETECT0) & ~ pin);
    //high level irq detect
    out32(dp->gpio1_regbase + GPIO_LEVELDETECT1, in32(dp->gpio1_regbase + GPIO_LEVELDETECT1) & ~pin);
    //rising edge detect
    out32(dp->gpio1_regbase + GPIO_RISINGDETECT, in32(dp->gpio1_regbase + GPIO_RISINGDETECT) & ~pin);
    //falling edge detect
    out32(dp->gpio1_regbase + GPIO_FALLINGDETECT, in32(dp->gpio1_regbase + GPIO_FALLINGDETECT) | pin);

    //Reset any stray status lurking
    out32(dp->gpio1_regbase + GPIO_IRQSTATUS_0, in32(dp->gpio1_regbase + GPIO_IRQSTATUS_0) | pin);

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Manuel_Salas
NXP TechSupport
NXP TechSupport

Hello @wslin123 

I hope you are doing very well.

Unfortunately, this channel does not provide support for QNX.

You can contact to our profesional services to get more information.

 

Best regards,

Salas.

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452件の閲覧回数
wslin123
Contributor I

Hello @Manuel_Salas 

Thanks for your reply.

If I simplify the questions and they're as follows.

  1. What's the interrupt vector of LVDS0_TS_INT pin?
  2. Where I can find the IRQ routing registers if I know the interrupt vector?

Then it seems to be not specific to QNX.

May I know if these two questions are supported on this channel?

Best Regards,

Wei-Shih Lin

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