We are trying to generate the SPL lpddr4_timing.c using the MX8M_DDR_tool for our own hardware PCB design incorporating Micron's MT53E512M32D1 (LP4DDR). In the MX8M_DDR_tool package, we found the example script\mx8mp\mx8mp_lpddr4_2gb_2000m_200m_50m_32bit_2cs_v6.ds, which serves as a starting point. However, we do not know yet how to modify this script for our LPDDR4 RAM.
Questions: can anyone provide a configuration for the MT53E512M32D1? Does anyone have the DS RAM init script for the LPDDR4 assembled on the 8MPLUS evaluation board so that we can see the differences?
Thank you and best wishes
Peter
