How to enable SPI2 on i.mx6ull

[stevenyu]

Hi all,

We would like to enable SPI2 on i.mx6ull, but we have no idea how to modify the device tree. Would you please advise us how to enable it and check it  ? Thanks.

We have already added this piece of description in arch\arm\boot\dts\imx6ull-14x14-evk.dts.

&ecspi2 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio4 22 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2_1 &pinctrl_ecspi2_cs_1>;
status = "disabled";

flash: n25q032@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,n25q032";
spi-max-frequency = <20000000>;
reg = <0>;
};
};

&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog_1>;
imx6ul-evk {

.................
pinctrl_ecspi2_cs_1: ecspi2_cs_grp-1 {
fsl,pins = <
MX6UL_PAD_UART4_RX_DATA__ECSPI2_SS0 0x10b0
>;
};

pinctrl_ecspi2_1: ecspi2grp-1 {
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__ECSPI2_MOSI 0x10b0
MX6UL_PAD_UART5_RX_DATA__ECSPI2_MISO 0x10b0
MX6UL_PAD_UART4_TX_DATA__ECSPI2_SCLK 0x10b0
>;
};

................

}

We have seen this piece of description in kernel-src\arch\arm\boot\dts\imx6ull.dtsi by default.

spi0 = &ecspi1;
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;

Regards,

shaotang

[igorpadykov]

Hi Steven

ecspi2 example can be found on

imx6ul-14x14-lpddr2-arm2.dts\dts\boot\arm\arch - linux-imx - i.MX Linux kernel 

for enabling change status ="okay"; 

Best regards
igor
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[stevenyu]

Hi Igor,

Thanks for your comments, and we have modified it to okay now. However, the chip select does not wait for SPI nor flash to return feedback data and just close and stop(as in attach picture), and we think cs-gpio=<0> setting maybe the reason. We have seen the example you show us, and it is cs-gpio=<&gpio ooxx>. But MX6UL_PAD_UART4_RX_DATA__ECSPI2_SS0 is not gpio, how should we configure cs-gpio here ? 

&ecspi2 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2_1 &pinctrl_ecspi2_cs_1>;
status = "disabled";

flash1: mx25l2005a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,mx25l2005a";
spi-max-frequency = <20000000>;
reg = <0>;
};
};

pinctrl_ecspi2_cs_1: ecspi2_cs_grp-1 {
fsl,pins = <
MX6UL_PAD_UART4_RX_DATA__ECSPI2_SS0 0x10b0
>;
};

pinctrl_ecspi2_1: ecspi2grp-1 {
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__ECSPI2_MOSI 0x10b0
MX6UL_PAD_UART5_RX_DATA__ECSPI2_MISO 0x10b0
MX6UL_PAD_UART4_TX_DATA__ECSPI2_SCLK 0x10b0
>;
};

Regards,

Steven Yu

[igorpadykov]

Hi Steven

for enabling native chip select one can refer to

How to enable native and gpio cs on ecspi 

However I do not think that it will help for problem that "chip select does not wait for SPI",

seems you should just decrease ecspi frequency.

Best regards
igor