Hi All,
Here I'm referring to a custom hardware design related to imx6q processor and I have done the DDR calibration using stress test tool 2.6 version and using those calibrated values edited the following u-boot.imx files.
800mhz_4*256mx16.cfg
ddr-setup.cfg
It is okay to edit read, write and DQS gating values according to the calibrations values. Then how should I determine the DSE values according to the my hardware design ? (I mean following values)
DATA 4, MX6_IOM_DRAM_CAS, 0x00000030
DATA 4, MX6_IOM_DRAM_RAS, 0x00000030
DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030
DATA 4, MX6_IOM_DRAM_RESET, 0x00000030
DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000
DATA 4, MX6_IOM_DRAM_SDODT0, 0x00000030
DATA 4, MX6_IOM_DRAM_SDODT1, 0x00000030
DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030
DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000
DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000028
DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000028
DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000028
DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000028
DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000028
DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000028
DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000028
DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000028
DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000
DATA 4, MX6_IOM_GRP_B0DS, 0x00000028
DATA 4, MX6_IOM_GRP_B1DS, 0x00000028
DATA 4, MX6_IOM_GRP_B2DS, 0x00000028
DATA 4, MX6_IOM_GRP_B3DS, 0x00000028
DATA 4, MX6_IOM_GRP_B4DS, 0x00000028
DATA 4, MX6_IOM_GRP_B5DS, 0x00000028
DATA 4, MX6_IOM_GRP_B6DS, 0x00000028
DATA 4, MX6_IOM_GRP_B7DS, 0x00000028
DATA 4, MX6_IOM_DRAM_DQM0, 0x00000028
DATA 4, MX6_IOM_DRAM_DQM1, 0x00000028
DATA 4, MX6_IOM_DRAM_DQM2, 0x00000028
DATA 4, MX6_IOM_DRAM_DQM3, 0x00000028
DATA 4, MX6_IOM_DRAM_DQM4, 0x00000028
DATA 4, MX6_IOM_DRAM_DQM5, 0x00000028
DATA 4, MX6_IOM_DRAM_DQM6, 0x00000028
DATA 4, MX6_IOM_DRAM_DQM7, 0x00000028
Because when I run the stress test I could figure out some hardware errors and when I apply the values of the reference design(nitrogen6_max) for the above sections I could reduce the errors. So could you please tell me the affect of the above values for the stress test ? How can I figure out the correct DSE values for my design ? Is it like trial and error by changing many times determine the correct DSE value ?
Regards,
Peter.
Hi,Peter,
I am sorry to break in about another question you encountered . How did you solve it?
the post is here
https://community.nxp.com/docs/DOC-105652
Do you have any idea of getting the same value for "Write leveling calibration" as follows ?
MMDC_MPWLDECTRL0 ch0 (0x021b080c) = 0x001F001F
MMDC_MPWLDECTRL1 ch0 (0x021b0810) = 0x001F001F
MMDC_MPWLDECTRL0 ch1 (0x021b480c) = 0x001F001F
MMDC_MPWLDECTRL1 ch1 (0x021b4810) = 0x001F001F
From where this value 0x001F001F came from ? If the test stuck in this point does that means even the processor couldn't access or write to the RAMs ? Is this a default value ? Even I tried 400MHz and 528MHz it shows the same result as above.
Regards,
Peter.
Hi jiang tao,
Need more specification of your problem. What kind of hardware are you referring to ? Based on what kind of processor?
In my case problem was with NVCC_LVDS2P5 power enable for the DDR pre-drivers (DRAM and RGMII interfaces).NVCC_LVDS2P5 must be powered-on even when not using the LVDS interface of imx6q processor.
Sorry I can't help you without clear spec. And please open a new question for this. Otherwise this thread will be confused.
Regards,
Kulunu.
Hi Peter
yes it like trial and error and observing signals with oscilloscope.
Also if cooling down the part causes more failures, then it is likely the drive strength is too high
causing more overshoots and undershoots. If heating up the part causes more failures,
then the drive strength is too low and the signals may not rise/fall fast enough.
Best regards
igor
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