How to compile the M core image into flash.bin on the imx8mp platform

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How to compile the M core image into flash.bin on the imx8mp platform

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logic887
Contributor III

How to compile the M core image into flash.bin on the imx8mp platform?

The soc.mak in the iMX95 directory has the corresponding M7 compilation option, but the soc.mak in the IMX8M directory does not have the corresponding M7 compilation option.

 
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Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hello,

They have different soc rom design, you can assemble .bin after bootloader, but it's unnecessary. The boot container could obtain M33, M7 and A55 images which means i.MX95 could kick up these core during boot. But i.MX8MP can't support boot from M core, it can only support A53 boot, that's why the imx-mkimage doesn't support M core image padding in i.MX8M.

 

If you need flash M image with UUU, you can add .bin like .dtb and Image, install it to FAT partition.

uuu_version 1.2.39

# Please Replace below items with actually file names
# @_flash.bin			| boot loader
# @_Image			| kernel image, arm64 is Image, arm32 it is zImage
# @_board.dtb			| board dtb file
# @_initramfs.cpio.zst.uboot	| mfgtool init ramfs
# @_rootfs.tar.zst		| rootfs
# @_uTee.tar			| optee image, put dummy _uTee.tar file here if platform is not MX6/MX7*

# This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ
SDP: boot -f _flash.bin

# This command will be run when ROM support stream mode
# i.MX8QXP, i.MX8QM
SDPS: boot -f _flash.bin

# These commands will be run when use SPL and will be skipped if no spl
# SDPU will be deprecated. please use SDPV instead of SDPU
# {
SDPU: delay 1000
SDPU: write -f _flash.bin -offset 0x57c00
SDPU: jump
# }

# These commands will be run when use SPL and will be skipped if no spl
# if (SPL support SDPV)
# {
SDPV: delay 1000
SDPV: write -f _flash.bin -skipspl
SDPV: jump
# }

# use uboot burn bootloader to eMMC
# becaue difference chip, offset is difference
# you can use kernel to do that for specific boards
FB: ucmd setenv fastboot_dev mmc
FB: ucmd setenv mmcdev ${emmc_dev}
FB: flash bootloader _flash.bin

FB: ucmd if env exists emmc_ack; then ; else setenv emmc_ack 0; fi;

FB: ucmd setenv emmc_cmd mmc partconf ${emmc_dev} ${emmc_ack} 1 0
FB: ucmd if test "${emmc_skip_fb}" != "yes"; then run emmc_cmd; fi
FB: ucmd setenv emmc_cmd mmc bootbus ${emmc_dev} 2 0 1;
FB: ucmd if test "${emmc_skip_fb}" != "yes"; then run emmc_cmd; fi

FB: ucmd setenv fastboot_buffer ${loadaddr}
FB: download -f _Image
FB: ucmd setenv fastboot_buffer ${fdt_addr}
FB: download -f _board.dtb
FB: ucmd setenv fastboot_buffer ${initrd_addr}
FB: download -f _initramfs.cpio.zst.uboot
#FB: ucmd setenv bootargs console=${console},${baudrate} earlycon=${earlycon},${baudrate}
FB: acmd ${kboot} ${loadaddr} ${initrd_addr} ${fdt_addr}

# get mmc dev number from kernel command line
# Wait for emmc
FBK: ucmd while [ ! -e /dev/mmcblk*boot0 ]; do sleep 1; echo "wait for /dev/mmcblk*boot* appear"; done;

# serach emmc device number, if your platform have more than two emmc chip, please echo dev number >/tmp/mmcdev 
FBK: ucmd dev=`ls /dev/mmcblk*boot*`; dev=($dev); dev=${dev[0]}; dev=${dev#/dev/mmcblk}; dev=${dev%boot*}; echo $dev > /tmp/mmcdev;

# dd to clear the possible MBR
FBK: ucmd mmc=`cat /tmp/mmcdev`; dd if=/dev/zero of=/dev/mmcblk${mmc} bs=512 count=1
# create partition
FBK: ucmd mmc=`cat /tmp/mmcdev`; PARTSTR=$'10M,500M,0c\n600M,,83\n'; echo "$PARTSTR" | sfdisk --force /dev/mmcblk${mmc}

FBK: ucmd mmc=`cat /tmp/mmcdev`; dd if=/dev/zero of=/dev/mmcblk${mmc} bs=1k seek=4096 count=1
FBK: ucmd sync
# you can enable below command to write boot partition. but offset is difference at difference platform
#FBK: ucmd mmc=`cat /tmp/mmcdev`; echo 0 > /sys/block/mmcblk${mmc}boot0/force_ro
#FBK: ucp  _flash.bin t:/tmp
#FBK: ucmd mmc=`cat /tmp/mmcdev`; dd if=/tmp/_flash.bin of=/dev/mmc${mmc}boot0 bs=1K seek=32
#FBK: ucmd mmc=`cat /tmp/mmcdev`; echo 1 > /sys/block/mmcblk${mmc}boot0/force_ro
FBK: ucmd mmc=`cat /tmp/mmcdev`; while [ ! -e /dev/mmcblk${mmc}p1 ]; do sleep 1; done
FBK: ucmd mmc=`cat /tmp/mmcdev`; mkfs.vfat /dev/mmcblk${mmc}p1
FBK: ucmd mmc=`cat /tmp/mmcdev`; mkdir -p /mnt/fat
FBK: ucmd mmc=`cat /tmp/mmcdev`; mount -t vfat /dev/mmcblk${mmc}p1 /mnt/fat
FBK: ucp  _Image t:/mnt/fat
FBK: ucp  _board.dtb t:/mnt/fat
FBK: ucp  _uTee.tar t:/tmp/op.tar
FBK: ucmd tar --no-same-owner -xf /tmp/op.tar -C /mnt/fat
FBK: ucmd umount /mnt/fat
FBK: ucmd mmc=`cat /tmp/mmcdev`; mkfs.ext3 -F -E nodiscard /dev/mmcblk${mmc}p2
FBK: ucmd mkdir -p /mnt/ext3
FBK: ucmd mmc=`cat /tmp/mmcdev`; mount /dev/mmcblk${mmc}p2 /mnt/ext3
FBK: acmd export EXTRACT_UNSAFE_SYMLINKS=1; tar --zstd --warning=no-timestamp -x -C /mnt/ext3
FBK: ucp  _rootfs.tar.zst t:-
FBK: Sync
FBK: ucmd umount /mnt/ext3
FBK: DONE


Best Regards,
Zhiming

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logic887
Contributor III

I want to know about the communication between M7 and A53 cores. Is there any documentation?

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logic887
Contributor III

Where can I find the M-core related APIs? Is there any documentation related to the M-core APIs?

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