Thanks Igor. That is almost exactly the same what I am doing now. With the difference that I am doing this using "syscon_regmap_lookup_by_compatible()" from machine init and not from fec driver. I do not want to do it this way as this is not correct and it is a blocker for upstreaming my board support. Lets have your (NXP) board as an example:
imx6qdl-sabreauto.dtsi\dts\boot\arm\arch - linux-imx - i.MX Linux kernel
The value 0x1b030 next to MX6QDL_PAD_RGMII_xxx pins translates into:
- DSE - 37/28 Ohm @ 2.5V, 36/32 Ohm pd/pu @ 1.8V
- ODT - R/O field, This property can be configured using Group Control Register
- PKE - Pull/Keeper Enabled
- PUE - Pull Enabled
- PUS - 100K Ohm Pull Up
- HYS - Schmitt trigger input
- DDR_INPUT - CMOS input mode
- DDR_SEL - R/O field, This property can be configured using Group Control Register
1. How would you set the ODT and DDR_SEL field for those RGMII pins in case your board design requires it?
2. How would you do that in a clean way? So no hacks to fec_main.c or similar.
The pad configuration is propagated nicely from device tree to the drivers/pinctrl/freescale/pinctrl-imx.c
So I am looking for some generic solution how to handle the pad group control registers as well.
Any other ideas how to do that?
Thanks, Michal.