GPIO Problems on IMX8ULP

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GPIO Problems on IMX8ULP

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embeddedtom
Contributor I

Hi,

I have a problem with the ports on the A35, the ports on the M33 work.

In the dts:

                gpio_export {

                               compatible = "gpio-export";

                               #size-cells = <0>;

 

                               SIO0_INIT_OUT {

                                               gpio-export,name = "SIO0_INIT_OUT";

                                               gpio-export,output = <0>;

                                               gpios = <&gpiof 14 0>;

                               };

 

                               SIO1_INIT_OUT {

                                               gpio-export,name = "SIO1_INIT_OUT";

                                               gpio-export,output = <0>;

                                               gpios = <&gpiof 21 0>;

                               };

                };

and

&iomuxc1 {

                pinctrl-names = "default";

                pinctrl-0 = <&pinctrl_hog>;

                pinctrl_hog: hoggrp {

                               fsl,pins = <

                                               MX8ULP_PAD_PTF12__PTF12   0x3

                                               MX8ULP_PAD_PTF13__PTF13   0x3

                                               MX8ULP_PAD_PTF14__PTF14   0x3

                                               MX8ULP_PAD_PTF21__PTF21   0x3

                               >;

                };

 

But on command line I get:

 

root@imx8ulp-microgea:~# cat /sys/kernel/debug/gpio

gpiochip0: GPIOs 0-31, parent: platform/gpio@0, imx-rpmsg-gpio-0:

gpiochip1: GPIOs 32-63, parent: platform/gpio@1, imx-rpmsg-gpio-1:

gpiochip2: GPIOs 64-95, parent: platform/gpio@2, imx-rpmsg-gpio-2:

gpiochip5: GPIOs 128-159, parent: platform/2e200080.gpio, 2e200080.gpio:

gpio-144 (                    |cd                  ) in  lo IRQ ACTIVE LOW

gpiochip3: GPIOs 160-191, parent: platform/2d000080.gpio, 2d000080.gpio:

gpio-173 (                    |phy-reset           ) out hi

gpiochip4: GPIOs 192-223, parent: platform/2d010080.gpio, 2d010080.gpio:

gpio-203 (                    |spi0 CS0            ) out hi ACTIVE LOW

gpio-204 (                    |regulator-wlregon   ) out lo

gpio-205 (                    |regulator-btregon   ) out lo

gpio-206 (                    |SIO0_INIT_OUT       ) out lo

gpio-213 (                    |SIO1_INIT_OUT       ) out lo

gpiochip9: GPIOs 496-499, parent: usb/1-1.7:1.0, ftdi-cbus, can sleep:

gpiochip8: GPIOs 500-503, parent: usb/1-1.6:1.0, ftdi-cbus, can sleep:

gpiochip7: GPIOs 504-507, parent: usb/1-1.2:1.0, ftdi-cbus, can sleep:

gpiochip6: GPIOs 508-511, parent: usb/1-1.1:1.0, ftdi-cbus, can sleep:

 

The GPIOs are inside gpiochip4, PTFxx should be inside gpiochip5, what goes wrong?

 

Thanks in advance, Tom

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935 Views
Manuel_Salas
NXP TechSupport
NXP TechSupport

Hello @embeddedtom 

 

Could you please share your BSP version?

 

Best regards.

 

Salas.

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