GPIO Line - Wakeup - Level Trigger

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GPIO Line - Wakeup - Level Trigger

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ayanavincent
Contributor I

Hi,

We are using custom board based on IMX6Q. We use Linux kernel imx_3.10.17_1.0.1_ga.

  We want to configure the 18th pin of GPIO bank 3 as wake input  in order to wake from suspend-to-RAM. Initially we chose edge triggered and we were able to do it (via SYSFS) and everything works fine. Now it turns out that we need to configure it as level triggered. The platform code has support for this (gpio_set_irq_type () in gpio-mxc.c). However, as we use gpiolib, we could only see the file, “edge”, in the SYSFS (/sys/class/gpio/gpio82/edge) and the possible values are “none”, “falling”, “rising” and “both” (gpiolib.c).

Could you please help us configure the GPIO line level trigger capable?

Regards,

Ayana Vincent

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi ayana

one can try to set

interrupt-cells property as 8 = active low level-sensitive

Configure GPIO as interrupt source

Linux Kernel Documentation :: gpio.txt

Best regards

igor

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ayanavincent
Contributor I

Dear Igor,

The interrupt-cells property is already configured for the GPIO contoller's output pins, and yet no expected results.

So we resorted to using the SYSFS way again. So we made a try as to somehow use the existing platform code which is available for level triggering (in gpio-mxc.c, gpio_set_irq_type()) through gpliolib by routing the code flow of edge configuration (i.e. /sys/class/gpio/<gpionum>/edge) to the level trigger configuration code flow.

  1. i.e. the below code is getting executed every time before the system goes to suspend mode so that the GPIO line would act as wake input:

gpio_set_irq_type()

{

switch (type) {

case IRQ_TYPE_EDGE_RISING:

//edge = GPIO_INT_RISE_EDGE;

edge = GPIO_INT_LOW_LEV;

if (edge != GPIO_INT_BOTH_EDGES) {

reg += GPIO_ICR1 + ((gpio_idx & 0x10) >> 2); /* lower or upper register */

bit = gpio_idx & 0xf;

val = readl(reg) & ~(0x3 << (bit << 1));

writel(val | (edge << (bit << 1)), reg);

}

writel(1 << gpio_idx, port->base + GPIO_ISR);

return 0;

}

Now level triggering works but the problem is that the ISR (mxc_gpio_irq_handler) runs repeatedly as a tight loop so long as the level is there so other things are getting affected badly and the system become unusable.

Could you please give us guidance as to how to make this level triggering feature usable?

Please help. Thanks.

-

Ayana

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