G133HAN01.01 LVDS dual channel support in imx8m

[antonyabeepraka]

Hi,

We are using imx8m quad lite custom board and the Kernel we are using is linux-imx 4.14.78 .

We need to support g133han01(resolution:1920x1080) dual channel lvds display. LVDS is connected over MIPI DSI bridge (SN65DSI84).We have added the support for g133han01 lvds and enabled driver for SN65DSI84 DSI bridge in our kernel.

But we are not getting any display output. Only a blank screen appears.

Below is our sn65dsi84 config

char addresses[] = {
                0x09, 0x0A, 0x0B, 0x0D, 0x10, 0x11, 0x12, 0x13,
                0x18, 0x19, 0x1A, 0x1B, 0x20, 0x21, 0x22, 0x23,
                0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B,
                0x2C, 0x2D, 0x2E, 0x2F, 0x30, 0x31, 0x32, 0x33,
                0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B,
                0x3C, 0x3D, 0x3E, 0x0D
                };

char values[] = {
                0x00, 0x05, 0x10, 0x00, 0x26, 0x00, 0x31, 0x00,
                0x6c, 0x00, 0x03, 0x00, 0x38, 0x04, 0x00, 0x00,
                0x00, 0x00, 0x00, 0x00, 0x59, 0x02, 0x00, 0x00,
                0x0e, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
                0x0e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                0x00, 0x00, 0x00, 0x01

                };

Please find the timing and display parameters we are using.

#define useTiming 0

#if useTiming
static const struct display_timing auo_g133han01_timing = {
        .pixelclock = { 134000000, 134000000, 134000000 },
        //.pixelclock = { 134000000, 141200000, 149000000 },
        .hactive = { 1920, 1920, 1920 },
        .hfront_porch = { 39, 58, 77 },
        .hback_porch = { 59, 88, 117 },
        .hsync_len = { 28, 42, 56 },
        .vactive = { 1080, 1080, 1080 },
        .vfront_porch = { 3, 8, 11 },
        .vback_porch = { 5, 14, 19 },
        .vsync_len = { 4, 14, 19 },
        .flags = DISPLAY_FLAGS_HSYNC_LOW |
                 DISPLAY_FLAGS_VSYNC_LOW |
                 DISPLAY_FLAGS_DE_LOW |
                 DISPLAY_FLAGS_PIXDATA_NEGEDGE,
};
#else
static const struct drm_display_mode auo_g133han01_mode = {
        .clock = 134000,
        .hdisplay = 1920,
        .hsync_start = 1920 + 50,
        .hsync_end = 1920 + 50 + 50,
        .htotal = 1920 + 50 + 50 + 50,
        .vdisplay = 1080,
        .vsync_start = 1080 + 1,
        .vsync_end = 1080 + 1 + 5,
        .vtotal = 1080 + 1 + 5 + 5,
        .vrefresh = 60,
        .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
};
#endif

static const struct panel_desc_dsi auo_g133han01 = {
        .desc = {
        #if useTiming
                .num_modes = 0,
                .timings = &auo_g133han01_timing,
                .num_timings = 1,
                .bpc = 8,
                .size = {
                        .width = 293,
                        .height = 165,
                },
                .bus_flags = DRM_BUS_FLAG_DE_LOW | DRM_BUS_FLAG_PIXDATA_NEGEDGE,
        #else
                .modes = &auo_g133han01_mode,
                .num_modes = 1,
                .bpc = 8,
                .size = {
                        .width = 293,
                        .height = 165,
                },
                .bus_flags = DRM_BUS_FLAG_DE_LOW,
        #endif
        },
        .flags = MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_CLOCK_NON_CONTINUOUS,
        //.flags = MIPI_DSI_MODE_VIDEO,
        .format = MIPI_DSI_FMT_RGB888,
        .lanes = 4,
};

Please suggest to resolve the issue.

Thanks

[igorpadykov]

Hi Antony

additionally one can try to adjust "display-timings" in
fsl-imx8mq-evk-dcss-rm67191.dtsi\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel 

Best regards
igor
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