FlexCAN on iMX8MP - receive buffer unlocking has unexpected behaviour

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Hi all, I have been having problem with Rx message buffers with FlexCAN on the iMX8MP (silicon rev 1P33A). When processing an incoming message, reading the FlexCAN TIMER register is not unlocking the message buffer.

We are using existing code which has been working solidly on iMX6 and iMX7, plus the extra initialisation steps to initialise the buffer memory for iMX8. We have 64 message buffers (16 bytes each). FlexCAN is in legacy mode, not using Rx Fifo. We are using the CAN port at 0x308D0000. As per ERR005829 we never use MB0.

When processing an incoming CAN message: example MB4 (messageidx=4) signalled by IFLAG1 having bit 4 set:

1) Calculate message buffer offset as 0x80 + messageidx * 16
2) keep reading C/S word (message buffer offset) until !CS_BUSY
3) copy 8 bytes data payload from message buffer
4) write corresponding bit in IFLAG1 or IFLAG2 to 1, clearing for that message
5) read32 FlexCAN TIMER register (as recommended in the RM).

This does not unlock the buffer to allow it to receive another message.

The Workaround
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Instead, I have to read C/S of another message buffer, which is listed elsewhere in the RM as a possible alternative (but not the recommended method). Reading a message buffer we dont actively use at the end of the range (MB63) works well. Reading MB0 C/S does not work consistently.

5) Read32 C/S word of the last message buffer (our workaround)

I am just confused over why this behaviour has changed compared with earlier iMX processors

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We have all the extra initialisation steps for iMX8,

1) MCR FRZ=1 HALT=1
2) wait for FRZ
3) MCR SUPV=0
4) CTRL2 WRMFZ=1 ECRWRE=1
5) MECR=0
6) Write32fill 0x308D0080 to 0x308D0ADC with 0 to initialise the CRCs
7) RXMBMASK=0, RX14MASK=0, RX15MASK=0, RXFGMASK=0
CTRL2 ECRWRE=0