In my iMX28 project I use Linux 2.6.35 + single port ethernet (iMX287 have 2 ethernet port). Ethernet transceiver is LAN8720A connectet to ENET0.
Only in some boards I have this problem: during Linux boot, system may reboot (sometimes forever). Below there is a small log of this event:
[...] boot [...]
mxs-spi mxs-spi.0: Max possible speed 24000 = 24000000/2 kHz
mxs-spi mxs-spi.0: at 0x80014000 mapped to 0xF0014000, irq=84, bus 1, DMA ver_major 4
vcan: Virtual CAN interface driver
Freescale FlexCAN Driver
CAN device driver interface
FEC Ethernet Driver
fec.c: fec_probe start init
fec.c: fec_probe get_resource
fec.c: fec_probe request_mem_region
fec.c: fec_probe alloc_etherdev
fec.c: fec_probe memset
fec.c: fec_probe memcpy2
fec.c: fec_probe i=0
fec.c: fec_probe i=1
fec.c: fec_probe dopo il for
fec.c: fec_probe clk_get
fec.c: fec_probe clk_enable
HTLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLFLC
PowerPrep start initialize power...
Configured for 5v only power source. Battery powered operation disabled.
[...] reboot forever or for 2 times [...]
NOTE: all fec.c ... are my comments
In a system go well the log is:
fec.c: fec_probe register_netdev:0
fec.c: fec_probe fine
fec.c: fec_probe start init
fec.c: fec_probe get_resource
fec.c: fec_probe request_mem_region
fec.c: fec_probe alloc_etherdev
fec.c: fec_probe memset
fec.c: fec_probe memcpy2
fec.c: fec_probe i=0
fec.c: fec_probe i=1
fec.c: fec_probe dopo il for
fec.c: fec_probe clk_get
fec.c: fec_probe clk_enable <<<<< this is the "crash point" in the fail case
----- FEC GPIO INIT (start) -----
----- ENET_PWR OK -----
----- ENET_PHY_RESET OK -----
----- FEC GPIO INIT (end) -----
fec.c: fec_probe pdata->init: 0
----- FEC GPIO INIT (start) -----
----- ENET_PWR OK -----
----- ENET_PHY_RESET OK -----
----- FEC GPIO INIT (end) -----
fec.c: fec_probe fec_enet_init:0
fec.c: fec_probe mii_init
fec.c: fec_probe register_netdev:0
fec.c: fec_probe fine
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
I debugged the init functions ad I used printk for tracing. Crash I think born in the function fec_probe in fec.c file. The exact point is here (in the fec_probe function):
clk_enable(fep->clk);
printk(KERN_ERR "fec.c: fec_probe clk_enable\n");
/* PHY reset should be done during clock on */
if (pdata && pdata->init)
ret = pdata->init(); <<<< crash!!!
printk(KERN_ERR "fec.c: fec_probe pdata->init: %d\n",ret);
//printk("----- FEC GPIO INIT (start) -----\n");
Exploding pdata->init() the function is implemented in mx28evk_pins.c: mx28evk_enet_gpio_init.
I traced also this function:
/* pwr */
gpio_request(MXS_PIN_TO_GPIO(PINID_SSP1_DATA3), "ENET_PWR");
gpio_direction_output(MXS_PIN_TO_GPIO(PINID_SSP1_DATA3), 0);
printk("----- ENET_PWR OK -----\n");
/* reset phy */
gpio_request(MXS_PIN_TO_GPIO(PINID_ENET0_RX_CLK), "PHY_RESET");
gpio_direction_output(MXS_PIN_TO_GPIO(PINID_ENET0_RX_CLK), 0);
printk("----- ENET_PHY_RESET OK -----\n"); <<<< critical comment!!!!!
/*
* Before timer bug fix(set wrong match value of timer),
* mdelay(10) delay 50ms actually.
* So change delay to 50ms after timer issue fix.
*/
mdelay(50);
gpio_direction_output(MXS_PIN_TO_GPIO(PINID_ENET0_RX_CLK), 1);
printk("----- FEC GPIO INIT (end) -----\n");
So, if i use all the comment printk like shown above the system runs well; but if I delete the comment in bold the system restarts (one or more times or forever).
I tried to add a mdelay(100) but without effects.
May be this an hardware dependent problem? May be only due to timeouts to wait some signal? Do someone have some suggestions?
The system seems to work well (for now) with this workaround (workaround: adding by printk comments!!!) but I would like to undenstand what does it appens...
Thanks in advance.
Emanuele
Hello,Emanuele,
Please download patch for FEC0 on i.mx28 form :
http://www.freescale.com/webapp/sps/site/prod_summary.jsp code=i.MX287&nodeId=018rH3ZrDRA24A&fpsp=1&tab=Design_Tools_Tab
---Updates and Patches (9)
------L2.6.35 10.12 FEC0 PATCH
Atfer patch it , then try it !
Regards,
Weidong
Thank you Sun, but I already applied this patch.
After a lot of testing, I think the problem may be this:
in my board I connected LAN8720A (Ethernet) at VDDIO 3V3 via mosfet (VDDIO: internal 3V3 iMX voltage regulator). So I think, when I turn on LAN via (GPIO2_15 like in iMX28 demo board), the 10 uF capacitor connected at LAN power supply resets the microcontroller. This behavior is not in all my boars but this depends to components tolerance.
With oscilloscope, in effect, I see a complete iMX reset and in duart log I don’t see anything (like you can see).
If I connect LAN transceiver directly to 3V3 power supplier (external regulator) all goes well. I tried tens of reboot and I never see any problem.
May be?
I think, also, may be useful initialize these ports:
{
.name = "PHY_RESET",
.id = PINID_ENET0_RX_CLK,
.fun = PIN_GPIO,
.strength = PAD_8MA,
.voltage = PAD_3_3V,
.output = 1,
.data = 0,
},
{
.name = "ENET_PWR",
.id = PINID_SSP1_DATA3,
.fun = PIN_GPIO,
.strength = PAD_8MA,
.voltage = PAD_3_3V,
.output = 0,
},
where PHY_RESET is nRST of LAN8720A and ENET_PWR is the driver for 3V3 power supplier.
Regards
Emanuele
Da: Weidong Sun mailto:admin@community.freescale.com
Inviato: mercoledì 17 aprile 2013 17:06
A: Coli Emanuele
Oggetto: Re: i.MX Community - FEC ethernet reboot in iMX28 during Linux startup
cid:image001.png@01CE3D0F.5A383580<https://community.freescale.com/index.jspa>
FEC ethernet reboot in iMX28 during Linux startup
creato da Weidong Sun<https://community.freescale.com/people/weidong.sun> ini.MX Community - Visualizza l'intera discussione<https://community.freescale.com/message/324863#324863>
Hello,Emanuele,
That's to say, you control 3.3V power via MOSFET by a GPIO to supply LAN8720A ? Right ? Could you share your schematic of LAN8720A here ?
Regards,
Weidong
This is a snapshot of my schematic.
NOTES:
NU = not mounted
VDDIO_3V3 = 3V3 power supply
REG3V3 = internal iMX28 regulator
FEC_PWR_EN = GPIO2.15
cid:image001.png@01CE3D1B.6749E370
cid:image002.png@01CE3D1B.6749E370
The configuration is the “wrong” configuration. Removing R5 and mounting R4 LAN will be connected directly to 3V3 external regulator (“good” configuration, I hope…). The last one configuration is the same configuration used in the iMX28 demo board.
Ciao
Emanuele
Da: Weidong Sun mailto:admin@community.freescale.com
Inviato: venerdì 19 aprile 2013 16:12
A: Coli Emanuele
Oggetto: Re: i.MX Community - FEC ethernet reboot in iMX28 during Linux startup
http://community.freescale.com/themes/freescale_theme/images/logo.png<https://community.freescale.com/index.jspa>
FEC ethernet reboot in iMX28 during Linux startup
creato da Weidong Sun<https://community.freescale.com/people/weidong.sun> ini.MX Community - Visualizza l'intera discussione<https://community.freescale.com/message/325343#325343>
Hello,Emanuele,
in your bootloader, I think you should pull FEC_PWR_EN down to LOW as early as possible. For example , if you use u-boot, you can try to do it in lowlevel_init.S.
Regards,
Weidong
Yes, this is correct. But by default at startup this pin is in high impedance and bootloader don’t touch this configuration (I use iMX28 bootlet) and I don’t need LAN in bootloader. In addition to this, to avoid the problem that you say, I used pullup resistor (see RR8 connected to VDDIO_3V3).
Da: Weidong Sun mailto:admin@community.freescale.com
Inviato: venerdì 19 aprile 2013 18:32
A: Coli Emanuele
Oggetto: Re: i.MX Community - FEC ethernet reboot in iMX28 during Linux startup
http://community.freescale.com/themes/freescale_theme/images/logo.png<https://community.freescale.com/index.jspa>
FEC ethernet reboot in iMX28 during Linux startup
creato da Weidong Sun<https://community.freescale.com/people/weidong.sun> ini.MX Community - Visualizza l'intera discussione<https://community.freescale.com/message/325429#325429>