HI,
We are trying to interface TLV320AIC3254 audio codec with Colibri IMX7D module using SAI3 interface.
And we want to configure codec as slave, it means that processor should give all the clocks MCLK, BCLK and WCLK. In my case we are getting mclk as 24MHz and no BCLK and WCLK.
What should we do to get the BCLK and WCLK from processor, please have a look at below nodes of the dts file and let us know any changes required and help us to get the clocks.
imx7-colibri.dtsi :-
sound1 {
compatible = "simple-audio-card";
simple-audio-card,name = "tlv320aic3254";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&codec_dai>;
simple-audio-card,frame-master = <&codec_dai>;
simple-audio-card,widgets =
"Microphone", "Mic Jack",
"Line", "Line In",
"Line", "Line Out",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"IN1_L", "Line In",
"IN1_R", "Line In",
"IN3_R", "Mic Jack",
"CM_L", "Mic Jack",
"CM_R", "Mic Jack",
"Line Out", "LOL",
"Line Out", "LOR",
"Headphone Jack", "HPL",
"Headphone Jack", "HPR";
simple-audio-card,cpu {
sound-dai = <&sai3>;
};
codec_dai: simple-audio-card,codec {
sound-dai = <&codec1>;
clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
};
};
&i2c4 {
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c4>;
pinctrl-1 = <&pinctrl_i2c4_recovery>;
scl-gpios = <&gpio7 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio7 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
codec1: tlv320aic3x54@18 {
compatible = "ti,tlv320aic32x4";
#sound-dai-cells = <0>;
reg = <0x18>;
clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
clock-names = "mclk";
pinctrl-names = "default";
status = "okay";
ldoin-supply = <®_module_3v3_avdd>;
iov-supply = <®_module_3v3_avdd>;
};
};
&sai3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai3 &pinctrl_sai3_mclk>;
assigned-clocks = <&clks IMX7D_SAI3_ROOT_SRC>,
<&clks IMX7D_SAI3_ROOT_CLK>;
assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
//assigned-clock-rates = <0>, <36864000>;
status = "okay";
};
pinctrl_sai3: sai3-grp {
fsl,pins = <
MX7D_PAD_SD1_DATA1__SAI3_TX_BCLK 0x1f
MX7D_PAD_SD1_DATA2__SAI3_TX_SYNC 0x1f
MX7D_PAD_SD1_DATA3__SAI3_TX_DATA0 0x30
MX7D_PAD_SD1_DATA0__SAI3_RX_DATA0 0x1f
>;
};
pinctrl_sai3_mclk: sai3grp_mclk {
fsl,pins = <
MX7D_PAD_SD1_RESET_B__SAI3_MCLK 0x1f
>;
};
Thanks & Regards,
P. Venkata prasad.