Hello Team,
We have designed a custom board with imx8m mini in which we have selected KSZ9021 as PHY .
PHY configuration
phy addr : 0
LED Mode : Tricolour Dual LED
125MHZ CLK DISABLE
RGMII mode - Advertise all capabilities
(10/100/1000 speed half-/full-duplex)
Kernel device tree support :
CONFIG_MICREL_PHY=y
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
phy-mode = "rgmii-id";
phy-handle = <ðphy0>;
phy-reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>;
phy-reset-post-delay = <150>;
phy-reset-duration = <10>;
fsl,magic-packet;
status = "okay";mdio {
#address-cells = <1>;
#size-cells = <0>;ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};
};
With this configuration PHY is detecting and i'm getting eth0 node in rootfilesystem.
Issue : When i try to assign an ip with dhclient, it unable to get an ip. Tried assigning ip manually but unable to ping dns or google.
ethtool output : Phy has been detected successfully
root@imx8mmpds:~# ethtool eth0
Settings for eth0:
Supported ports: [ TP MII ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
Supported pause frame use: Symmetric
Supports auto-negotiation: Yes
Supported FEC modes: Not reported
Advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
Advertised pause frame use: Symmetric
Advertised auto-negotiation: Yes
Advertised FEC modes: Not reported
Link partner advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
Link partner advertised pause frame use: Symmetric
Link partner advertised auto-negotiation: Yes
Link partner advertised FEC modes: Not reported
Speed: 100Mb/s
Duplex: Full
Port: MII
PHYAD: 0
Transceiver: internal
Auto-negotiation: on
Supports Wake-on: g
Wake-on: d
Link detected: yes
query's :
1) Is my device tree looks fine ?
2) Any driver modifications or fix ups required for KSZ9021 to work?
Best Regards
khaleel
Hi,
I have ever used ksz9031 for i.MX8MM, see attachment, please!
In addition, if you used 3.3V IO between CPU and ksz9021, you should disable pull-up/down feature of ENET pads. If pull-up/down resistors are needed, external pull should be used.
for disabling ENET pin's pull up/down, re-configure these pins , please!
---------------------------------
MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19
-----------------------------------------------
For 1.8V IO, default configurations are OK, don't need to re-configure them.
Have a nice day!
Regards,
weidong
Hi weidong,
Thank you for the reply.
KSZ9021 supports only 3.3V/2.5V, In our custom board we are using 2.5V as IO voltage.
Do i still need to reconfigure ENET pads?
Best regards
khaleel