Hi Artur,
Is this turnaround time coming into play when performing a because Udaya seems to be doing alternate Write and Read?
What if I am doing consecutive Writes? I am facing a similar issue, I am using a 16 bit multiplexed Asynchronous mode. And from my code I am writing 32 bytes of data in a for loop. I am using iMX51 though but I guess the symptom is the same. Here is my WEIM CS0 configuration:
{
0x00010039 , //CSxGCR1
0x00000002 , //CSxGCR2
0x20475230 , //CSxRCR1
0x00000000 , //CSxRCR2
0x609C0E98 , //CSxWCR1
0x00000000 , //CSxWCR2
}
I am able to increase/decrease the CS timing using CS0WCR1.WWSC but the delay in between two consecutive chip selects is of the order of 200nanoSecs, even though I have set CS0GCR1.CSREC to 0.
The rate at which I can send data out on the WEIM Bus is very critical, can you please suggest me a way in which the inter-CS time can be brought down? Is Burst mode synchronous access going to result in faster data throughput?