Dual channel hardware encoding on MCIMX6Y2DVM05A / MCIMX6Y2CVM05A?

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Dual channel hardware encoding on MCIMX6Y2DVM05A / MCIMX6Y2CVM05A?

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Contributor I


I'm looking to develop two channel safety camera on the i.MX6 platform, and was rather hoping to use one of the 6UL chips above.

Quality isn't an issue (I'm not expecting 1080p at 60fps..) , something like 2× 720p@ 30fps would be entirely adequate.

Unfortunately the i.MX 6Solo family of chips are 8× the cost, however I am confident by looking at the block diagram that the i.MX 6Solo is capable of dual channel hardware assisted video encoding; is that correct?

What is the smallest/least expensive option for hardware assisted video encoding under mainline Linux for the i.MX family?

(ps. my 2nd camera channel potentially needs to be connected 1 meter away, I'm aware MIPI/CSI recommends a maximum cable length of 400mm, so it's entirely possible that I end up receiving one encoded stream over USB, and try to do the other encoding on-chip via the CSI/parallel camera.

Thanks so much,

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NXP TechSupport
NXP TechSupport

Hi leeexcession

 

I think you are right, i.MX6S is best option as i.MX6UL has not vpu module.

i.MX comparison table below shows available options

https://www.nxp.com/docs/en/supporting-information/FLYRIMXPRDCMPR.pdf

 

Best regards
igor

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