Hello,
I am designing a board with the i.MX6Q and (4) 2GBIT 800MHZ FBGA modules on board. I have read the Hardware Development Guide from Freescale regarding keeping the trace lengths as equal in length as possible. My question though is as follows: The guide requests that I keep my clock traces to a max length of 2.25 inches and every other trace group smaller than that. In my design, I can't keep my Address lines smaller than 4.5 inches in length for the group. Where can I compromise the recommendations? Do I make my clock lines at least 4.5 inches in length, or leave the clock lines as is and the address lines would just be longer than the clock?
Thanks in advance,
Joseph
Hi Joseph
in this case clock line should be increased up to 4.5 inches, so
when clock arrives all control/data were in proper place.
In general, if layout rules can not be followed, ibis modelling should be implemented
so all timings were calculated based on specific board conditions.
Best regards
igor
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