DDR3 CLK termination

[FreeScaleLogin]

Hi,
We are in the rudimentary stage of Schemtic design of i.MX535 .DDR3 clock lines has been terminated with 200 ohm res in the ref schematic of Sabre.

Question is , In general, differential clock will be terminated by 100 ohm . Can anyone explain, why they double the resistor value in Sabre design?

Regards,

UKR

[T_I]

Hi,

I think to same.So I asked Freescale this Question.

Freescale's answer is "

One can try 100 Ohm also. 200Ohm was proved as sufficient for obtaining best results.

".

Regards,