Hello everybody,
We are troubleshooting our custom board using the i.MX280 with a 5V only power supply. Our board fails during Power_Prep stage. We've ensured that Power_Prep.c has 5V only mode defined and battery mode commented out. We have no problems booting with the i.MX28 EVK, only our board fails.
Setup:
External power supply for VDD5V
Debug UART used sb_loader.exe
Tried fully assembled board and one with only required components placed... both fail the same way.
Our hardware is set up for VDD5V only as outlined in AN4199
Our boot resistors are set to boot from SD card. With no SD card installed, on power up we get 0x8020a014 as expected and the processor presumably enters USB recovery mode. At this point the voltages are as follows:
VDD5V = 5.09
VDD4P2 = 0.868
VDDIO = 3.20
VDDA = 1.87
VDDD = 1.20
Now we use sb_loader.exe to send the boot file imx28_ivt_uboot.sb (bootlet version 1.1.0) and receive the following output:
PowerPrep start initialize power...
Configured for 5v only power source. Battery powered operation disabled.
After this no more messages from the DUART and the voltages are:
VDD5V = 5.04
VDD4P2 = 4.54
VDDIO = 1
VDDA = 0.2
VDDD = 0
After placing printf() statements in Power_Prep.c in and out of each function, we see that the last function called is PowerPrep_InitDcdc4p2Source();.
See attached scope image of VDD4P2 rail:
Questions:
1. Any ideas for failure cause?
2. Prior to running imx28_ivt_uboot.sb, what should the power rail voltages be when processor simply has VDD5V applied (no bootlet yet)?
3. Where in this power process is the 100mA current limitation (page 4, section 3.2 AN4199 (http://cache.freescale.com/files/32bit/doc/app_note/AN4199.pdf?fasp=1&WT_TYPE=Application%20Notes&WT...)? We see just over 100mA on our board and i.MX28 EVK when only the processor is powered.
Thanks in advance!
解決済! 解決策の投稿を見る。
For conclusion...
It appears we have the trace impedance wrong for the DDR2 DQS pins. We'll spin a new board and try again.
Chris,
It seems your description matches the one from this thread:
Thanks Fabio. This is a very good thread. I'll keep watching it. After grounding the TESTMODE pin, we are successfully past the Power_Prep stage. Unfortunately, I think we may now have an issue with RAM traces. We are using the same DDR2 part from MX28EVK, so I think we should be OK with the software. We did play around with the drive levels, and also double checked configuration settings against the datasheet, but saw no difference. We keep hanging in the Boot_Prep stage, where the simple RAM test fails.
Hi Chris,
could you please post the result of the RAM test?
Is the test result stable or random?
Stefan
Thanks Stefan.
Here's what we get. I broke out the middle. Notice the first 2 addresses have the same value, then the following alternates.
Thanks for your help,
Chris
0x8020a014
PowerPrep start initialize power...
Configured for 5v only power source. Battery powered operation disabled.
Nov 20 201417:53:50
FRAC 0x92925552
memory type is DDR2
Wait for ddr ready 1power 0x00820710
Frac 0x92925552
start change cpu freq
hbus 0x00000003
cpu 0x00010001
start test memory accress
ddr2 0x40000000
0x00000001 error value 0xFA81543A
0x00000002 error value 0xFA81543A
0x00000003 error value 0x00000000
0x00000004 error value 0xFA81543A
0x00000005 error value 0x00000000
0x00000006 error value 0xFA81543A
0x00000007 error value 0x00000000
|
|
|
0x000003E1 error value 0x00000000
0x000003E2 error value 0xFA81543A
0x000003E3 error value 0x00000000
0x000003E4 error value 0xFA81543A
0x000003E5 error value 0x00000000
0x000003E6 error value 0xFA81543A
0x000003E7 error value 0x00000000
finish simple test
Undefined Ins0x8020a014
For conclusion...
It appears we have the trace impedance wrong for the DDR2 DQS pins. We'll spin a new board and try again.
Hi,
Have you used the batteryless patch?
"L2.6.35_10.12_5V_SUPPLY_PATCH : Linux patch for i.MX28 SDK
2010.12 to add the most robust support possible for a VDD5V or
DCDC_BATT only configuration..
Can you share your schematic? Attached you can find an schematic that can be used as reference.
Hello Alejandro,
Thanks for responding. We are using this patch L2.6.35_10.12_SDK_5V_SUPPLY_PATCH.
We currently do not have the TESTMODE pin tied to ground, but are in the process of having a board modified to include the fix. We are also replacing the current i.MX280 with an i.MX287 part in case there are active pins in our EVK-working software that we are unaware of.
Question:
Is it possible there may be default EVK fuse configurations that we won't have with our prototype? Do you know of any fuses that may be blown for the EVK iMX287, that would not be blown for our off-the-shelf iMX280?
Thanks for your time and help,
Chris
Hi Alejandro, I just saw you message here. I just now created an SR with the attached schematic. The SR log number is 1-3460774951.
I added a note in the SR description that mentions the TESTMODE pin being tied to ground appears to fix the Power_Prep stage... meaning we can boot past it now. However, the boot fails at the DDR2 initialization stage just before u-boot. Please take a look at our schematic and see if you have any ideas.
Thanks!
Chris
Hi Cris,
I noticed that the SR is handled by one of my peers. If possible could you please share the solution?
Best Regards,
Alejandro
No problem. Who is your peer? We are taking several angles on this issue... FAE, forums, SR, and Freescale services.
Thanks for responding,
Chris