Cortex M4 UART Idle Line Detect

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Cortex M4 UART Idle Line Detect

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sameer11
Contributor I

Hi, 

I am trying to implement uart idle line detection mechanism in bare metal application. There is not much information provided in "i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020" regarding the same. I have followed the basic rules for initializing the idle interrupt referring to manual but it seems like the IDEN bit in UART control register doesn't have any impact on IDLE status flag, it is always high during power on even after clearing the status flag during initialization.

Also SDK's implementation is not clear where it uses WAKE interrupt and manually clearing and setting the IDLE flag based on WAKE status flag. I am looking forward to use DMA further rather than FIFO once I am able to achieve RX IDLE detection. 

If there is any application note or SDK sample specific to Idle line detect, can you please guide on this?

Please let me know if any further information is required.

Thanks,

Sameer

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Dhruvit
NXP TechSupport
NXP TechSupport

Hi @sameer11,

I have shared the additional details over email.

 

Best Regards,
Dhruvit.

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