I'm trying to use the internal ADC driver in the imx-25. I'm running Linux 2.6.31 with the mxc additions. I've been able to configure the driver as a module, rebuild the kernel, and modules, and install the module.
The device (/dev/imx_adc) shows up and I'm able to issue the "init" and "deinit" ioctls. However, when trying to get a conversion of the general purpose channel 0, the driver initially hung; and the system required a hard reset to recover. Looking at the driver code, there are two while loops waiting on specific status events. I added some code to time out in 10 jiffies (100ms), and print out which of the loops got aborted. What isn't happening is the EOQ status bit is never getting set.
I've included the snippet from imx_adc_read_general below with my changes and debug statements:
enum IMX_ADC_STATUS imx_adc_read_general(unsigned short *result)
{
unsigned long reg;
unsigned int data_num = 0;
unsigned long start;
pr_debug("imx_adc_read_general\n");
reg = __raw_readl(tsc_base + GCQCR);
reg |= CQCR_FQS;
__raw_writel(reg, tsc_base + GCQCR);
pr_debug(" GCQCR = %08X\n", __raw_readl(tsc_base + GCQCR));
pr_debug(" GCC0 = %08X\n", __raw_readl(tsc_base + GCC0));
start = jiffies;
while (!(__raw_readl(tsc_base + GCQSR) & CQSR_EOQ))
{
if (jiffies == start + 10)
{
pr_debug(" GCQSR = %08X\n", __raw_readl(tsc_base + GCQSR));
pr_debug(" aborting EOQ loop\n");
break;
}
continue;
}
After trying a conversion I get the following output from dmesg:
root@ublnx-arm-base:/lib/modules/2.6.31-SBT/kernel/drivers/mxc/adc# dmesg
imx_adc : imx_adc_open()
init adc
imx_adc_init()
MXC_CCM_CCTL = 2103C0008
convert adc
imx_adc_read_general
GCQCR = 00000F06
GCC0 = 100317DC
GCQSR = 00002000
aborting EOQ loop
deinit adc
imx_adc_deinit()
imx_adc : imx_adc_free()
Can anyone help with this. Has anyone ever successfully gotten a general purpose input to convert?
Ed