Hi NXP Team,
I’m currently working on integrating the Lontium LT9211C display bridge with the i.MX8MP EVK. My use case is to input LVDS from the SoC and output MIPI DSI via the LT9211C. The panel side (MIPI) has been validated using the bridge’s internal pattern generator, so the output pipeline from the bridge to the panel is confirmed working.
However, when I configure the LT9211C for LVDS input, I don’t see any activity on the LVDS pixel clock from the SoC side. It seems like the LVDS output from the SoC is not enabled.
Device Tree Changes
Here are the relevant changes I made in imx8mp-evk.dts:
LT9211C Bridge Node
&i2c3 {
lvds_bridge: lt9211c-bridge@2d {
compatible = "lontium,lt9211c";
reg = <0x2d>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lt9211c_reset>;
vccio-supply = <<9211_1v8>;
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
status = "okay";
port {
lt9211c_in: endpoint {
remote-endpoint = <&lvds_out>;
};
};
};
};
LDB Node
&ldb {
status = "okay";
fsl,data-mapping = "jeida";
fsl,data-width = <24>;
lvds-channel@0 {
status = "okay";
port@1 {
reg = <1>;
lvds_out: endpoint {
remote-endpoint = <<9211c_in>;
};
};
};
};
Observations
From user-space, I don’t see any LVDS output signal or pixel clock.
I verified with a scope — the LVDS CLK lines from the SoC are flat.
cat /sys/kernel/debug/clk/clk_summary | grep ldb shows the clocks are not enabled:
media_ldb 0 0 0 1039500000 0 0 50000 N
media_ldb_root_clk 0 0 0 1039500000 0 0 50000 N
root@imx8mp-lpddr4-evk:~# dmesg | grep -i drm
[ 1.960496] [drm] Initialized vivante 1.0.0 20170808 for 40000000.mix_gpu_ml on minor 0
[ 2.461595] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 2.469595] imx-drm display-subsystem: bound imx-lcdifv3-crtc.1 (ops lcdifv3_crtc_ops)
[ 2.477563] imx-drm display-subsystem: bound imx-lcdifv3-crtc.2 (ops lcdifv3_crtc_ops)
[ 2.492643] [drm:drm_bridge_attach] *ERROR* failed to attach bridge /soc@0/bus@32c00000/mipi_dsi@32e60000 to encoder DSI-40: -19
Questions:
Do I need to define display timings under the ldb node or are they expected to be in the bridge/panel node?
Is any additional configuration required in the imx-lcdif or ldb nodes to enable LVDS output and clocks?
Is there any known issue or requirement with enabling LVDS in single-channel mode with external bridges like LT9211C?
Any guidance or suggestions you can provide to help bring up the LVDS output path would be greatly appreciated.