Hi,
I am facing the same issue as already described here https://community.nxp.com/t5/i-MX-Processors/How-to-obtain-2-different-SAI-MCLKs/m-p/687570?commentI...
Explaining it again.
Codec tlv320aic32x4 as slave
CPU iMX7D as master
connected on SAI2 interface
I am trying to change the sai2.mck frequency, by default it is getting measured as 24MHz, I want to change it to any other freq (lets say 36864000Hz).
The parent clock selected for SAI2_CLK_ROOT is OSC by default which tells why we are getting 24MHz.
Here we need to change the parent clk, I was able to do that with the device tree changes and able to see it in clk_summary (cat /sys/kernel/debug/clk/clk_summary | grep sai2)
But surprisingle it was still coming as 24Mhz on oscilloscope.
Further investigation showd me that if I disable AUDIO_MCLK_CLK_ROOT (0x3038BC80) , the output on sai2.mclk disappers and appreads after I again enable it
devmem2 0x3038BC80 w 0x00000000 // clock got disabled
devmem2 0x3038BC80 w 0x10000000 // clock got enabled
So, it seems to be related to AUDIO_MCLK and not SAI2.MCLK. I am not able to find any relavent data in reference manual on how there two are linked.
However, when I tried to change the parent clock of AUDIO_MCLK from device tree, I was able to change it but the clock gating got disabled (IMX7D_AUDIO_MCLK_ROOT_CG)
I am looking for any guide/hints to solve the mclk issue.
Let me know if any more information is required
