Can't Enable Multiple PWM on iMX8M-Mini

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Can't Enable Multiple PWM on iMX8M-Mini

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jonathon_sowers
Contributor I

I am trying to enable two PWMs to control manually via sysfs. Enabling one with the following additions to my device tree sources works as expected:

&iomuxc {
    ...
    ucm-imx8m-mini {
        ...
        pinctrl_pwm1: pwm@1 {
            fsl,pins = <
                MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT    0x80000000
            >;
        };
    };
};
&pwm1 { /* buzzer */
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_pwm1>;
    status = "okay";
};

this creates /sys/class/pwm/pwmchip0 from which I can export pwm0

However, if I try to enable any other pwm as with the following, it fails:

&iomuxc {
    ...
    ucm-imx8m-mini {
        ...
        pinctrl_pwm2: pwm@2 {
            fsl,pins = <
                MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT    0x80000000
            >;
        };
    };
    ...
};


&pwm2 { /* constant current source */
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_pwm2>;
    status = "okay";
};

I have verified that the above is actually compiled into my final dtb by de-compiling it:

...
            pwm@1 {
                fsl,pins = <0x2c 0x294 0x0 0x1 0x0 0x80000000>;
                linux,phandle = <0x4b>;
                phandle = <0x4b>;
            };

            pwm@2 {
                fsl,pins = <0x1ec 0x454 0x0 0x1 0x0 0x80000000>;
                linux,phandle = <0x4c>;
                phandle = <0x4c>;
            };
...


    pwm@30660000 {
        compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm";
        reg = <0x0 0x30660000 0x0 0x10000>;
        interrupts = <0x0 0x51 0x4>;
        clocks = <0x4 0x18f 0x4 0x18f>;
        clock-names = "ipg", "per";
        #pwm-cells = <0x2>;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <0x4b>;
    };

    pwm@30670000 {
        compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm";
        reg = <0x0 0x30670000 0x0 0x10000>;
        interrupts = <0x0 0x52 0x4>;
        clocks = <0x4 0x190 0x4 0x190>;
        clock-names = "ipg", "per";
        #pwm-cells = <0x2>;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <0x4c>;
    };

I did have to delete a pinctrl node exporting PWM2 on a different pad in an inherited dts file, but I have verified this did not make it to the final compiled dtb.

The result of adding the second (and I have tried with both PWM2 and PWM3) is the following error suggesting that PWM2 is trying to use the same pinctrl pad as PWM1 which from the above device tree seems like an error.

[] imx8mm-pinctrl 30330000.pinctrl: pin MX8MM_IOMUXC_GPIO1_IO01 already requested by 30660000.pwm; cannot claim for 30670000.pwm
[] imx8mm-pinctrl 30330000.pinctrl: pin-11 (30670000.pwm) status -22
[] imx8mm-pinctrl 30330000.pinctrl: could not request pin 11 (MX8MM_IOMUXC_GPIO1_IO01) from group pwm  on device 30330000.pinctrl
[] imx-pwm 30670000.pwm: Error applying setting, reverse things back
[] imx-pwm: probe of 30670000.pwm failed with error -22

If I remove PWM1 from the device tree, PWM2 seems to work fine.

Is there something I'm missing to be able to setup both PWM chips in parallel?

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igorpadykov
NXP Employee
NXP Employee

Hi Jon

for severals pwms example one can look at nitrogen boards:

linux-imx6/imx8mmn-nitrogen8mm.dtsi at boundary-imx_5.4.x_1.0.0-pass1 · boundarydevices/linux-imx6 ·... 

Best regards
igor
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jonathon_sowers
Contributor I

Hi Igor,

If you could kindly compare & contrast the link you provided, you will notice the only difference is the pinctrl setting for each pad (my default: 0x80000000 vs nitrogen 0x16). While this doesn't seem to have anything to do with the issue I described above I did change the pad settings to match those in the device tree you provided, but without any change to my issue.

Do you have any other thoughts or useful links that might possibly help me solve this?

Thanks,

Jon

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igorpadykov
NXP Employee
NXP Employee

Hi Jon

 

0x80000000 means that pad settings are derived from uboot.

What bsp used in the case, suggest to try ones from  nxp

official source.codeaurora.org/external/imx/linux-imx  repository
https://source.codeaurora.org/external/imx/linux-imx/tree/?h=imx_5.4.3_2.0.0

 

Best regards
igor

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jonathon_sowers
Contributor I

I figured it out with a little debugging in the kernel. It turns out that naming the pinctrl nodes pwm@1 and pwm@2 is what caused the problem. It seems this groups them together and then when the pwm@30670000 node is probed (not sure if this terminology is exactly correct) it takes the first pin from the group which is the one from pwm@1 and throws an error.

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jonathon_sowers
Contributor I

Thanks for the info on the significance of 0x80000000, I have always been curious about that.

Unfortunately, the only place in the linux-imx source where I could find a pwm channel being exported it is using the same pad setting as in the link you provided above (0x16), which I already mentioned I tried and it failed as well.

Additionally, I tried the pad setting that my SOM manufacturer used (0x03) and it still produces the same results. I would contact them about the issue, but this seems more of a problem with the Kernel/ARM processor as the kernel dmesg seems to indicate it is trying to use the same pad for PWM2 as was used for PWM1 even though the above details I have provided seem to indicate that should not be case.

Any other thoughts on how to troubleshoot? I have found where the error occurs in the kernel source, but it's hard to follow how it reaches that point.

Thanks!

Jon

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