Hello,
I've been reading MX8MN RM for a while and try to figure out a way to generate CCM_CLKO at GPIO.
Also, I've read the following posts covering the CCM_CLKO topics
https://community.nxp.com/t5/i-MX-Processors/i-MX8MM-CCM-OUTPUT/td-p/1179744
https://community.nxp.com/t5/i-MX-Processors/clock-generation-on-CCM-CLKO2/m-p/628613
https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Mini-definition-of-CCM-CLKO-2-1-pins/m-p/966969
https://community.nxp.com/t5/i-MX-Processors/CCM-CLKO-as-CLK-input-for-peripheral/m-p/971263
My first question is that MX8MN RM gives two different ways to configure CCM_CLKO.
1. Through CCM Mem Map Regs
CCM_CLKO locates in Slice 116/117 and can be accessed through CCM Mem Map Regs
2. Through CCM Analog Mem Map Regs
Which one should be use or what are the differences between these two register sets?
The second question is can I use a CLK buffer to deliver the CCM_CLKO to other peripherals?
In this post https://community.nxp.com/t5/i-MX-Processors/i-MX8MM-CCM-OUTPUT/td-p/1179744
Igor wrote that the stability is defined by the used crystal and it seems this CCM_CLKO can serve as a CLK source feeding other peripherals.
But in other posts,
https://community.nxp.com/t5/i-MX-Processors/CCM-CLKO-as-CLK-input-for-peripheral/m-p/971263
https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Mini-definition-of-CCM-CLKO-2-1-pins/m-p/966969
guys were saying that CCM_CLO is just for monitor use.
So which saying is true?
Thanks
