I'm not really sure what the problem could be but we currently have a pretty big problem. Basically our custom boards have a pretty low yield due to a very random boot issue. Everything from unrecognized instruction to the system just halting during the boot process. I included some outputs below. The failures are pretty spread out and the only thing i can think of is we have some bad CPU's or maybe ddr.
CPU: Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: POR
Board: MX6Q-Camaro
DRAM: 1 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
SF: Detected S25FL512SA with page size 64 KiB, total 64 MiB
*** Warning - bad CRC, using default environment
## Booting kernel from Legacy Image at 80800000 ...Image Name: Linux-3.0.35-ts-armv7l
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3575448 Bytes = 3.4 MiB
Load Address: 80008000
Entry Point: 80008000
Verifying Checksum ... OK
Loading Kernel Image ... OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
Error: unrecognized/unsupported processor variant (0x412fc09a).
## Booting kernel from Legacy Image at 80800000 ...
Image Name: Linux-3.0.35-ts-armv7l
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3575448 Bytes = 3.4 MiB
Load Address: 80008000
Entry Point: 80008000
Verifying Checksum ... OK
Loading Kernel Image ... OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
U-Boot 2013.07 (Mar 12 2014 - 11:46:23)
CPU: Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: POR
Board: MX6Q-Camaro
DRAM: 1 GiB
MMC:
## Booting kernel from Legacy Image at 80800000 ...
Image Name: Linux-3.0.35-ts-armv7l
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3575448 Bytes = 3.4 MiB
Load Address: 80008000
Entry Point: 80008000
Verifying Checksum ... Bad Data CRC
ERROR: can't get kernel image!
CPU: Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: POR
Board: MX6Q-Camaro
DRAM: 1 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
SF: Detected S25FL512SA with page size 64 KiB, total 64 MiB
himport_r: can't insert "netargs=setenv bootargs console=${console},${baudrate} root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" ie
U-Boot 2013.07 (Mar 12 2014 - 11:46:23)
CPU: Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: POR
Board: MX6Q-Camaro
DRAM: 1 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
SF: Detected S25FL512SA with page size 64 KiB, total 64 MiB
This thread Custom iMX6 board SDRAM DDR2 Config OpenOCD/JTAG may be useful to you. I noticed that the DRAM start address is 0x10000000 and not 0x80000000
First, please try to test memory.
"i.MX6 DDR Stress Test Tool V1.0.2"
https://community.freescale.com/docs/DOC-96412
Have a great day,
Yuri
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I'm having a hard time getting this to work. I'm going to go verify the settings i'm using with my electrical team.
C:\Users\User\Desktop\DDR_Stress_Tester_V1.0.2\Binary>DDR_Stress_Tester.exe -t mx6x -df imx6.inc -usb
MX6DQ opened.
dcd address 0x020bc000 out of valid range.
the addr out of valid range.
I don't think the part number changes anything. The 40 ohm resistors in blue, are those internal resistors to the imx6.
Device Information | |
Manufacturer: | Micron |
Memory part number: | MT42L256M32D2LG-18 |
Memory type: | LPDDR2-1066 |
DRAM single die density (Gb) | 1 |
DRAM density per Channel (Gb) | 1 |
DRAM Bus Width | 32 |
Number of Chip Selects used per Channel | 1 |
DRAM density per CS (Gb) | 1 |
DRAM Bus Width Per Channel | 32 |
Number of Banks | 8 |
Number of ROW Addresses | 14 |
Number of COLUMN Addresses | 10 |
System Information | |
i.Mx Part | i.Mx6Q |
MMDC channels: | MMDC0 |
Bus Width | 32 |
DRAM Clock Freq (MHz) | 528 |
DRAM Clock Cycle Time (ns) | 1.894 |
4KB Interleaving Mode | Non-Interleave |
SI Configuration | |
DRAM DSE Setting - DQ/DQM (ohm) | 40 |
DRAM DSE Setting - ADDR/CMD/CTL (ohm) | 40 |
DRAM DSE Setting - CK (ohm) | 40 |
DRAM DSE Setting - DQS (ohm) | 40 |
I noticed in the excel configuration, you have 8Gb as the single die density. Since the memory you are using has 2 die and the total density is 8Gb, the single die density should be 4Gb.
With more support we fixed the selections, but when running the stress test just stops and never finishes without any output.
//============================================================================= | ||
// DDR Controller Registers | ||
//============================================================================= | ||
// Manufacturer: | Micron | |
// Device Part Number: | MT42L256M32D2LG-18 WT:A | |
// Clock Freq.: | 533MHz | |
// Density per CS in Gb: | 4 | |
// Chip Selects used: | 2 | |
// Number of channels | 1 | |
// Density per channel (Gb) | 8 | |
// Total DRAM density (Gb) | 8 | |
// Number of Banks: | 8 | |
// Row address: | 14 | |
// Column address: | 10 | |
// Data bus width | 32 | |
//============================================================================= |