About changing the internal LDOs voltage in i.MX6DQ.

[keitanagashima]

Dear All,

Hello. We'd like to change the internal LDOs voltage.

Could you tell me the way of proper setting about below LDOs?

(We'd like to know the setting in u-boot and kernel.)

OS: jb4.2.2_1.1.0

[LDO's output voltage]

- LDO_SOC (VDD_SOC_CAP) : 1.275V   //for DDR clock Jitter

- LDO_ARM (VDD_ARM_CAP) : 1.250V   //for ARM freq up (1GHz)

- LDO_PU (VDD_PU_CAP) : 1.275V   //for VPU freq up (352MHz)

- LDO1P1 (NVCC_PLL_OUT) : 1.175V   //for DDR clock Jitter

- LDO2P5 (VDD_HIGH_CAP)  : 2.700V    //for DDR clock Jitter

[Other information]

> ARM freq up (1GHz)

Change the ARM clock

$ echo userspace > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor

$ echo 996000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed

> VPU freq up (352MHz)

Add the kernel config (menu config)

  [*] MX6 VPU 352MHz

Best Regards,

Keita

[AnsonHuang]

Hi, Keita

     Please try below:

[LDO's output voltage]

- LDO_SOC (VDD_SOC_CAP) : 1.275V   //for DDR clock Jitter

- LDO_ARM (VDD_ARM_CAP) : 1.250V   //for ARM freq up (1GHz)

- LDO_PU (VDD_PU_CAP) : 1.275V   //for VPU freq up (352MHz)

[Anson] no need to do changes, LDO_PU always equal to LDO_SOC. BTW, to use LDO enable mode, you have to use imx6q-sabresd-ldo.dtb, by default we use ldo bypass mode which is using imx6q-sabresd.dtb, for SabreAI board, only LDO enable mode is supported, no need to change dtb. Please do it according to your board design.

- LDO1P1 (NVCC_PLL_OUT) : 1.175V   //for DDR clock Jitter

[Anson] LDO1P1 is NOT dynamically changed in kernel, we use default value which is 1.1V, if you want to increase it to 1.175V, you need to program PMU_REG_1P1 register in PMU chapter, bit [12:8] need to modified to 0x13, you can do it in uboot using "md/mw" command to read/write register or using /unit_tests/memtool to read/write register in kernel. Or you can add code in uboot to do this change, either way is OK.

- LDO2P5 (VDD_HIGH_CAP)  : 2.700V    //for DDR clock Jitter

[Anson] Same as above, modify the PMU_REG_2P5 bit [12:8] to 0x18, 0x10 means 2.5V, each step is 25mV, so add 8 steps to make it 2.7V.

[Other information]

> ARM freq up (1GHz)

Change the ARM clock

$ echo userspace > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor

$ echo 996000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed

[Anson] for 1GHz, the voltage we used for VDD_SOC/PU_CAP is 1.25V, to increase them to 1.275V, you need to modify the table in arch/arm/boot/dts/imx6q.dtsi,

29                         operating-points = <

30                                 /* kHz    uV */

31                                 1200000 1275000

32                                 996000  1250000

33                                 852000  1250000

34                                 792000  1175000

35                                 396000  975000

36                         >;

37                         fsl,soc-operating-points = <

38                                 /* ARM kHz  SOC-PU uV */

39                                 1200000 1275000

40                                 996000  1250000     /* change to 1275000 */

41                                 852000  1250000

42                                 792000  1175000

43                                 396000  1175000

44                         >;

> VPU freq up (352MHz)

Add the kernel config (menu config)

  [*] MX6 VPU 352MHz

[Anson] Correct.

[keitanagashima]

Dear Yongcai Huang,

Hello. Thank you for your great answer!

But, my customer is using b4.2.2_1.1.0 and Kernel 3.0.35.

So, the .dtb file doesn't exist...

Best Regards,

Keita

[AnsonHuang]

Hi, Keita

     OK, if for kernel 3.0.35, by default kernel uses LDO bypass mode, to use LDO enable mode, you have to add "ldo_active=on" in u-boot cmdline, then kernel will switch to LDO enable mode, otherwise, internal VDDARM and VDDSOC/PU's LDO will be bypass, to adjust their voltage, you have to adjust external PMIC's output.

[keitanagashima]

Dear Yongcai Huang,

Hello. Sorry for my delay response.

My customer isn't use the PMIC (They are using discreet ICs).

Because they aren't using "arch\arm\mach-mx6\mx6q_sabresd_pmic_pfuze100.c", LDO is enabled.

When LDO is enabled, is it right in the below my understanding?

PLease check it.

[Q1] Should one change below setting to change the LDO voltage?

[Q2] Is there a code which it should set to the others?

     (We worry about whether or not a overwritten by other codes.)

For Kernel;

Change the "cpu_op" voltage in arch\arm\mach-mx6\cpu_op-mx6.c.

For U-boot;

Change the "arch_cpu_init" in cpu\arm_cortexa8\mx6\generic.c

Best Regards,
Keita

[AnsonHuang · Accepted solution]

Hi, Keita

[Q1] Should one change below setting to change the LDO voltage?

[Q2] Is there a code which it should set to the others?

     (We worry about whether or not a overwritten by other codes.)

For Kernel;

Change the "cpu_op" voltage in arch\arm\mach-mx6\cpu_op-mx6.c.

[Anson] Correct, after kernel boot up, only cpufreq will change the voltage/freq, it will follow the table in the file you listed, you just need to change the table accordingly, choose the right array.

For U-boot;

Change the "arch_cpu_init" in cpu\arm_cortexa8\mx6\generic.c

[Anson] Yes, but the setting in u-boot will be over written by kernel cpufreq driver if it is enabled after kernel boot up. CPUFreq is the only one who change the voltage/freq.

[keitanagashima]

Hi Yongcai,

Great answer!

Thank you very much!!

Best Regards,

Keita

[karina_valencia]

AnsonHuang​ please continue with the  follow up