About LCDIF Timing

[x10]

Hi,

I get confused about definitions of variables in Fig 33-11 and Fig 33-12 LCD Interface Signals in MPU Write/Read Mode (iMX28 RM rev2 p.2455).

1. Are the TCS and TCH refer to CMD_SETUP and CMD_HOLD in register HW_LCDIF_TIMING respectively?

2. Are the TDSR and TDHR refer to DATA_SETUP and DATA_HOLD in register HW_LCDIF_TIMING respectively?

3. Where can I find the definitions of W1, W2, and W3?

Please let me know if available, Thanks!

BR

Cheng Shi

[arthur_lai · Accepted solution]

Hi Cheng Shi,

The answers for question 1 and 2 are yes.

TCS and TCH refer to CMD_SETUP and CMD_HOLD in register HW_LCDIF_TIMING respectively.

TDSR and TDHR refer to DATA_SETUP and DATA_HOLD in register HW_LCDIF_TIMING respectively.

W1, W2, and W3 are governed by other timings and do not need to be configured.

Thanks,

Arthur

[x10]

Thanks Arthur,

I have finished the driver of LCDIF as a parallel bus with right timing.

BR

Cheng Shi