About IMX1176 Multicore Project M4 M7 Memory Organisation

[tbayram]

Hello Everybody,

Im working on IMX1176 with a multicore TFT LCD project. We need to determine Ram regions for M4 and M7 cores. on photos we determined ram regions for M4 ans M7 cores.  But there is  conflict  for ram regions. İs there any problem for conflict beetwen M7's SRAM OC_1 and CM4's NCACHE regions. Could you give me an advice for seperating RAM regions for M4 and M7 cores.

Thansk. 

  

[tbayram]

hi @kerryzhou ,

Thanks for reply. can you explain why this ram is divided so many times and what these divided areas do?

[kerryzhou · Accepted solution]

Hi @tbayram ,

  You are always welcome!

   The example which I share you is from the complicated demo, which mix the face recognition, voice recoginition and the GUI, then the demo is complicated, that divide the RAM to several pices for the app demand.

  In your real situation, you can use it by your own requirement, don't also refer to the example do so much pieces.

Wish it helps you!

Best Regards,

Kerry

[tbayram]

hi @kerryzhou ,

Thanks for your reply,

İs there any problem for ram region conflict beetwen m4 and m7 and could you explain me why there are a lot of region for both cores.which aim are these regions used for ? Thanks

[kerryzhou]

Hi @tbayram ,

  In fact, to your cm4 and cm7 accessed shared RAM, if you don't access it at the same time, it also don't conflict. 

  But, if you find some RAM area, both your CM4 and CM7 will access it at the same time, you can divide the RAM to the different range, then CM4 and CM7 access the different range which is defined in the above memory details.

Best Regards,

kerry

[kerryzhou]

Hi @tbayram ,

  If you want the CM7 and CM4 RAM is conflict, you totally can define the different RAM range to the CM7 and CM4.

  This the RT117H demo situation for CM7 and CM4, you can refer to it.

Best Regards,

Kerry